Patents by Inventor Thomas L. Ritzdorf

Thomas L. Ritzdorf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030066752
    Abstract: An electrochemical processing apparatus for processing a microelectronic workpiece includes a metrology unit and a control, signal-connected to the metrology unit. An electrochemical deposition unit provides a space to receive said microelectronic workpiece to deposit a subsequent film layer onto a prior layer, wherein a condition signal from the metrology unit influences the process control of the electrochemical deposition unit. The signal can also be used to transfer the microelectronic workpiece to a layer stripping unit, or a layer enhancement unit, or to a non-compliance station. The apparatus is particularly useful in measuring seed layer thickness and adjusting the operating control of a computational fluid dynamic reactor, which electroplates a process layer onto the seed layer.
    Type: Application
    Filed: August 6, 2002
    Publication date: April 10, 2003
    Inventors: Thomas L. Ritzdorf, Steve L. Eudy, Gregory J. Wilson, Paul R. McHugh
  • Publication number: 20030045095
    Abstract: A method for filling recessed micro-structures at a surface of a semiconductor wafer with metallization is set forth. In accordance with the method, a metal layer is deposited into the micro-structures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed micro-structures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties.
    Type: Application
    Filed: June 12, 2001
    Publication date: March 6, 2003
    Applicant: Semitool, Inc.
    Inventors: Thomas L. Ritzdorf, Lyndon W. Graham, Robert W. Batz
  • Publication number: 20030029732
    Abstract: A semiconductor workpiece holder used in electroplating systems for plating metal layers, such as copper, onto a semiconductor workpiece. The workpiece holder includes electrodes which extend and are partially submerged in a liquid plating bath. The electrodes have a contact face which bears against the workpiece and conducts current therebetween. The submersible portions of the electrodes are partially covered with a dielectric layer or surface and partially covered with a conductive layer or surface. The conductive surface is preferably spaced from the contact face and placed in direct contact with the plating bath to allow diversion of some of the plating current directly between the electrode and plating bath. Associated methods are also described.
    Type: Application
    Filed: June 10, 2002
    Publication date: February 13, 2003
    Inventors: Thomas L. Ritzdorf, Jeffrey I. Turner, Robert W. Berner
  • Publication number: 20030020928
    Abstract: A method and apparatus for processing a microelectronic workpiece using metrology. The apparatus can include one or more processing or transport units, a metrology unit, and a control unit coupled to the metrology unit and at least one of the processing or transport units. The control unit can modify a process recipe or a process sequence of the processing unit based on a feed forward or a feed back signal from the metrology unit. The control unit can also provide instructions to the transport unit to move the workpiece to a selected processing unit. The processing unit can include, inter alia, a seed layer deposition unit, a process layer electrochemical deposition unit, a seed layer enhancement unit, a chemical mechanical polishing unit, and/or an annealing chamber arranged for sequential processing of a workpiece. The processing units can be controlled as an integrated system using one or more metrology units, or a separate metrology unit can provide input to the processing units.
    Type: Application
    Filed: July 9, 2001
    Publication date: January 30, 2003
    Inventors: Thomas L. Ritzdorf, Steve L. Eudy, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Brian Aegerter, Curt Dundas, Steven L. Peace
  • Publication number: 20030015417
    Abstract: An automated chemical management system for managing the chemical content of an electrochemical bath used to deposit a material on the surface of a microelectronic workpiece is set forth. The automated chemical management system includes a dosing system that is adapted to dose an amount of one or more chemicals to replenish a given electrochemical bath constituent in accordance with a predetermined dosing equation. The chemical management system also includes an analytical measurement system that is adapted to provide a measurement result indicative of the amount of the given constituent in the electrochemical bath at predetermined time intervals. The chemical management system uses the measurement results to modify the dosing equation of the dosing system. In this manner, the replenishment operations executed by the chemical management system are effectively refined over time thereby providing more accurate control of the amount of the target constituent in the electrochemical bath.
    Type: Application
    Filed: January 23, 2002
    Publication date: January 23, 2003
    Applicant: Semitool, Inc.
    Inventors: Dakin Fulton, Thomas L. Ritzdorf
  • Patent number: 6508920
    Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: January 21, 2003
    Assignee: Semitool, Inc.
    Inventors: Thomas L. Ritzdorf, E. Henry Stevens, LinLin Chen, Lyndon W. Graham, Curt Dundas
  • Publication number: 20020139678
    Abstract: A facility for selecting and refining electrical parameters for processing a microelectronic workpiece in a processing chamber is described. The facility initially configures the electrical parameters in accordance with either a mathematical model of the processing chamber or experimental data derived from operating the actual processing chamber. After a workpiece is processed with the initial parameter configuration, the results are measured and a sensitivity matrix based upon the mathematical model of the processing chamber is used to select new parameters that correct for any deficiencies measured in the processing of the first workpiece. These parameters are then used in processing a second workpiece, which may be similarly measured, and the results used to further refine the parameters.
    Type: Application
    Filed: May 24, 2001
    Publication date: October 3, 2002
    Inventors: Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
  • Patent number: 6454926
    Abstract: A semiconductor workpiece holder used in electroplating systems for plating metal layers, such as copper, onto a semiconductor workpiece. The workpiece holder includes electrodes which extend and are partially submerged in a liquid plating bath. The electrodes have a contact face which bears against the workpiece and conducts current therebetween. The submersible portions of the electrodes are partially covered with a dielectric layer or surface and partially covered with a conductive layer or surface. The conductive surface is preferably spaced from the contact face and placed in direct contact with the plating bath to allow diversion of some of the plating current directly between the electrode and plating bath. Associated methods are also described.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: September 24, 2002
    Assignee: Semitool Inc.
    Inventors: Thomas L. Ritzdorf, Jeffrey I. Turner, Robert W. Berner
  • Publication number: 20020125141
    Abstract: A facility for selecting and refining electrical parameters for processing a microelectronic workpiece in a processing chamber is described. The facility initially configures the electrical parameters in accordance with either a mathematical model of the processing chamber or experimental data derived from operating the actual processing chamber. After a workpiece is processed with the initial parameter configuration, the results are measured and a sensitivity matrix based upon the mathematical model of the processing chamber is used to select new parameters that correct for any deficiencies measured in the processing of the first workpiece. These parameters are then used in processing a second workpiece, which may be similarly measured, and the results used to further refine the parameters.
    Type: Application
    Filed: May 24, 2001
    Publication date: September 12, 2002
    Inventors: Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
  • Patent number: 6428673
    Abstract: An electrochemical processing apparatus for processing a microelectronic workpiece includes a metrology unit and a control, signal-connected to the metrology unit. An electrochemical deposition unit provides a space to receive said microelectronic workpiece to deposit a subsequent film layer onto a prior layer, wherein a condition signal from the metrology unit influences the process control of the electrochemical deposition unit. The signal can also be used to transfer the microelectronic workpiece to a layer stripping unit, or a layer enhancement unit, or to a non-compliance station. The apparatus is particularly useful in measuring seed layer thickness and adjusting the operating control of a computational fluid dynamic reactor, which electroplates a process layer onto the seed layer.
    Type: Grant
    Filed: July 8, 2000
    Date of Patent: August 6, 2002
    Assignee: Semitool, Inc.
    Inventors: Thomas L. Ritzdorf, Steve L. Eudy, Gregory J. Wilson, Paul R. McHugh
  • Publication number: 20020102837
    Abstract: A method for filling recessed micro-structures at a surface of a semiconductor wafer with metallization is set forth. In accordance with the method, a metal layer is deposited into the micro-structures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed micro-structures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties.
    Type: Application
    Filed: March 28, 2002
    Publication date: August 1, 2002
    Inventors: Thomas L. Ritzdorf, Lyndon W. Graham
  • Publication number: 20020074233
    Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.
    Type: Application
    Filed: June 20, 2001
    Publication date: June 20, 2002
    Applicant: Semitool, Inc.
    Inventors: Thomas L. Ritzdorf, E. Henry Stevens, Linlin Chen, Lyndon W. Graham, Curt Dundas
  • Publication number: 20020053509
    Abstract: Processing tools, components of tools, and methods of making and using such devices for electrochemical processing of microelectronic workpieces. One aspect of the invention is directed toward reaction vessels for electrochemical processing of microelectronic workpieces, processing stations including such reaction vessels, and methods for using these devices. For example, one embodiment of a reaction vessel includes an outer container having an outer wall, a first outlet configured to introduce a primary fluid flow into the outer container, and at least one second outlet configured to introduce a secondary fluid flow into the outer container separate from the primary fluid flow. The reaction vessel can also include at least one electrode, and it can also have a field shaping unit.
    Type: Application
    Filed: June 15, 2001
    Publication date: May 9, 2002
    Inventors: Kyle M. Hanson, Steve L. Eudy, Thomas L. Ritzdorf, Gregory J. Wilson, Daniel J. Woodruff, Randy Harris, Curtis A. Weber, Tim McGlenn, Timothy A. Anderson, Daniel P. Bexten
  • Publication number: 20020046952
    Abstract: A system for electroplating a semiconductor wafer is set forth. The system comprises a first electrode in electrical contact with the semiconductor wafer and a second electrode. The first electrode and the semiconductor wafer form a cathode during electroplating of the semiconductor wafer. The second electrode forms an anode during electroplating of the semiconductor wafer. A reaction container defining a reaction chamber is also employed. The reaction chamber comprises an electrically conductive plating solution. At least a portion of each of the first electrode, the second electrode, and the semiconductor wafer contact the plating solution during electroplating of the semiconductor wafer. An auxiliary electrode is disposed exterior to the reaction chamber and positioned for contact with plating solution exiting the reaction chamber during cleaning of the first electrode to thereby provide an electrically conductive path between the auxiliary electrode and the first electrode.
    Type: Application
    Filed: January 3, 2002
    Publication date: April 25, 2002
    Inventors: Lyndon W. Graham, Kyle Hanson, Thomas L. Ritzdorf, Jeffrey I. Turner
  • Patent number: 6365033
    Abstract: A method for measuring a target constituent of an electroplating solution using an electroanalytical technique is set forth in which the electroplating solution includes one or more constituents whose by-products skew an initial electrical response to an energy input of the electroanalytical technique. The method comprises a first step in which an electroanalytical measurement cycle of the target constituent is initiated by providing an energy input to a pair of electrodes disposed in the electroplating solution. The energy input to the pair of electrodes is provided for at least a predetermined time period corresponding to a time period in which the electroanalytical measurement cycle reaches a steady-state condition. In a subsequent step, an electroanalytical measurement of the energy output of the electroanalytical technique is taken after the electroanalytical measurement cycle has reached the steady-state condition.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: April 2, 2002
    Assignee: Semitoof, Inc.
    Inventors: Lyndon W. Graham, Thomas C. Taylor, Thomas L. Ritzdorf, Fredrick A. Lindberg, Bradley C. Carpenter
  • Publication number: 20020037641
    Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.
    Type: Application
    Filed: June 15, 2001
    Publication date: March 28, 2002
    Inventors: Thomas L. Ritzdorf, E. Henry Stevens, LinLin Chen, Lyndon W. Graham, Curt Dundas
  • Publication number: 20020032499
    Abstract: A facility for selecting and refining electrical parameters for processing a microelectronic workpiece in a processing chamber is described. The facility initially configures the electrical parameters in accordance with either a numerical of the processing chamber or experimental data derived from operating the actual processing chamber. After a workpiece is processed with the initial parameter configuration, the results are measured and a sensitivity matrix based upon the numerical model of the processing chamber is used to select new parameters that correct for any deficiencies measured in the processing of the first workpiece. These parameters are then used in processing a second workpiece, which may be similarly measured, and the results used to further refine the parameters.
    Type: Application
    Filed: May 4, 2001
    Publication date: March 14, 2002
    Inventors: Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
  • Publication number: 20020022363
    Abstract: A method for filling recessed micro-structures at a surface of a semiconductor wafer with metallization is set forth. In accordance with the method, a metal layer is deposited into the micro-structures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed micro-structures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties.
    Type: Application
    Filed: February 4, 1998
    Publication date: February 21, 2002
    Inventors: THOMAS L. RITZDORF, LYNDON W. GRAHAM
  • Publication number: 20020017456
    Abstract: A system for electroplating a semiconductor wafer is set forth. The system comprises a first electrode in electrical contact with the semiconductor wafer and a second electrode. The first electrode and the semiconductor wafer form a cathode during electroplating of the semiconductor wafer. The second electrode forms an anode during electroplating of the semiconductor wafer. A reaction container defining a reaction chamber is also employed. The reaction chamber comprises an electrically conductive plating solution. At least a portion of each of the first electrode, the second electrode, and the semiconductor wafer contact the plating solution during electroplating of the semiconductor wafer. An auxiliary electrode is disposed exterior to the reaction chamber and positioned for contact with plating solution exiting the reaction chamber during cleaning of the first electrode to thereby provide an electrically conductive path between the auxiliary electrode and the first electrode.
    Type: Application
    Filed: October 15, 2001
    Publication date: February 14, 2002
    Inventors: Lyndon W. Graham, Kyle Hanson, Thomas L. Ritzdorf, Jeffrey I. Turner
  • Publication number: 20020008034
    Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent confirm copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.
    Type: Application
    Filed: December 7, 2000
    Publication date: January 24, 2002
    Inventors: Linlin Chen, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf