Patents by Inventor Thomas L. SOUNART

Thomas L. SOUNART has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230096368
    Abstract: An inductor structure, a package substrate, an integrated circuit device, an integrated circuit device assembly and a method of fabricating the inductor structure. The inductor structure includes: an electrically conductive body; and a magnetic structure including a non-electrically-conductive magnetic material, wherein: one of the magnetic structure or the electrically conductive body wraps around another one of the magnetic structure or the electrically conductive body to form the inductor structure therewith; and at least one of the electrically conductive body or the magnetic structure has a granular microstructure including randomly distributed particles presenting substantially non-linear particle-to-particle boundaries with one another.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Aleksandar Aleksov, Adel Elsherbini, Johanna Swan, Feras Eid, Thomas L. Sounart, Henning Braunisch, Beomseok Choi, Krishna Bharath, Kaladhar Radhakrishnan, William J. Lambert
  • Publication number: 20230095654
    Abstract: In one embodiment, a conformal power delivery structure includes a first electrically conductive layer comprising metal. The first electrically conductive layer defines one or more recesses, and the conformal power delivery structure also includes a second electrically conductive layer comprising metal that is at least partially within the recesses of the first electrically conductive layer. The second electrically conductive layer has a lower surface that generally conforms with the upper surface of the first electrically conductive layer. The conformal power delivery structure further includes a dielectric material between the surfaces of the first electrically conductive layer and the second electrically conductive layer that conform with one another.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Adel Elsherbini, Feras Eid, Stephen Morein, Krishna Bharath, Henning Braunisch, Beomseok Choi, Brandon M. Rawlings, Thomas L. Sounart, Johanna Swan, Yoshihiro Tomita, Aleksandar Aleksov
  • Publication number: 20230094979
    Abstract: Technologies for conformal power delivery structures near high-speed signal traces are disclosed. In one embodiment, a dielectric layer may be used to keep a power delivery structure spaced apart from high-speed signal traces, preventing deterioration of signals on the high-speed signal traces due to capacitive coupling to the power delivery structure.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Aleksandar Aleksov, Henning Braunisch, Feras Eid, Adel Elsherbini, Stephen Morein, Yoshihiro Tomita, Thomas L. Sounart, Johanna Swan, Brandon M. Rawlings
  • Publication number: 20230095608
    Abstract: A embedded passive structure, a microelectronic system, and an integrated circuit device assembly, and a method of forming the embedded passive structure. The embedded passive structure includes a base layer; a passive device attached to the base layer; a first power plane comprising metal and adjacent an upper surface of the base layer, the first power plane having a portion electrically coupled to a terminal of the passive device, wherein an upper surface of a combination of the first power plane and the passive device defines a recess; a second power plane comprising metal, the second power plane at least partially within the recess and having a lower surface that conforms with the upper surface of the combination; and a liner including a dielectric layer between the first power plane and the second power plane.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Adel Elsherbini, Aleksandar Aleksov, Feras Eid, Henning Braunisch, Thomas L. Sounart, Johanna Swan, Beomseok Choi, Krishna Bharath, William J. Lambert, Kaladhar Radhakrishnan
  • Publication number: 20230098020
    Abstract: Technologies for cooling conformal power delivery structures are disclosed. In one embodiment, an integrated circuit component has a die with a backside power plane mated to it. A lid of the integrated circuit component is mated with the backside power plane, forming a sealed cavity. The lid has an inlet and an outlet, and a channel is defined in the lid for liquid coolant to flow from the inlet, across the backside power plane, and to the outlet. The liquid coolant directly contacts the backside power plane, efficiently removing heat from the backside power plane.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Feras Eid, Aleksandar Aleksov, Henning Braunisch, Adel Elsherbini, Thomas L. Sounart, Johanna Swan
  • Publication number: 20230091666
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques directed to embedding capacitors in through glass vias within a glass core of a substrate. In embodiments, the through glass vias may extend entirely from a first side of the glass core to a second side of the glass core opposite the first side. Layers of electrically conductive material and dielectric material may then be deposited within the through glass via to form a capacitor. the capacitor may then be electrically coupled with electrical routings on buildup layers on either side of the glass core. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 23, 2023
    Inventors: Benjamin DUONG, Aleksandar ALEKSOV, Helme A. CASTRO DE LA TORRE, Kristof DARMAWIKARTA, Darko GRUJICIC, Sashi S. KANDANUR, Suddhasattwa NAD, Srinivas V. PIETAMBARAM, Rengarajan SHANMUGAM, Thomas L. SOUNART, Marcel WALL
  • Patent number: 11421376
    Abstract: Embodiments of the invention include an active fiber with a piezoelectric layer that has a crystallization temperature that is greater than a melt or draw temperature of the fiber and methods of forming such active fibers. According to an embodiment, a first electrode is formed over an outer surface of a fiber. Embodiments may then include depositing a first amorphous piezoelectric layer over the first electrode. Thereafter, the first amorphous piezoelectric layer may be crystallized with a pulsed laser annealing process to form a first crystallized piezoelectric layer. In an embodiment, the pulsed laser annealing process may include exposing the first amorphous piezoelectric layer to radiation from an excimer laser with an energy density between approximately 10 and 100 mJ/cm2 and pulse width between approximately 10 and 50 nanoseconds. Embodiments may also include forming a second electrode over an outer surface of the crystallized piezoelectric layer.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Shawna M. Liff, Feras Eid, Aleksandar Aleksov, Sasha N. Oster, Baris Bicen, Thomas L. Sounart, Valluri R. Rao, Johanna M. Swan
  • Patent number: 11223524
    Abstract: Embodiments of the invention include a physiological sensor system. According to an embodiment the sensor system may include a package substrate, a plurality of sensors formed on the substrate, a second electrical component, and an encryption bank formed along a data transmission path between the plurality of sensors and the second electrical component. In an embodiment the encryption bank may include a plurality of portions that each have one or more switches integrated into the package substrate. In an embodiment each sensor transmits data to the second electrical component along different portions of the encryption bank. In some embodiments, the switches may be piezoelectrically actuated. In other embodiments the switches may be actuated by thermal expansion. Additional embodiments may include tri- or bi-stable mechanical switches.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: January 11, 2022
    Assignee: Intel Corporation
    Inventors: Shawna M. Liff, Adel A. Elsherbini, Sasha N. Oster, Feras Eid, Georgios C. Dogiamis, Thomas L. Sounart, Johanna M. Swan
  • Publication number: 20210375719
    Abstract: A semiconductor device that has a semiconductor die coupled to a substrate. A mold compound encapsulates the semiconductor die, and at least one thermal conductive material section extends from adjacent the semiconductor die through the mold compound. The at least one conductive material section thus conveys heat from the semiconductor die through the mold compound.
    Type: Application
    Filed: August 11, 2021
    Publication date: December 2, 2021
    Inventors: Feras Eid, Shrenik Kothari, Chandra M. Jha, Johanna M. Swan, Michael J. Baker, Shawna M. Liff, Thomas L. Sounart, Betsegaw K. Gebrehiwot, Shankar Devasenathipathy, Taylor Gaines, Digvijay Ashokkumar Raorane
  • Patent number: 11016288
    Abstract: Embodiments of the invention include a display formed on an organic substrate and methods of forming such a device. According to an embodiment, an array of pixel mirrors may be formed on the organic substrate. For example, each of the pixel mirrors is actuatable about one or more axes out of the plane of the organic substrate. Additionally, embodiments of the invention may include an array of routing mirrors formed on the organic substrate. According to an embodiment, each of the routing mirrors is actuatable about two axes out of the plane of the organic substrate. In embodiments of the invention, a light source may be used for emitting light towards the array of routing mirrors. For example, light emitted from the light source may be reflected to one or more of the pixel mirrors by one of the routing mirrors.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: May 25, 2021
    Assignee: Intel Corporation
    Inventors: Sasha N. Oster, Feras Eid, Johanna M. Swan, Thomas L. Sounart, Aleksandar Aleksov, Shawna M. Liff, Baris Bicen, Valluri R. Rao
  • Publication number: 20210104650
    Abstract: An semiconductor manufacturing apparatus and method to smooth surfaces of discrete pads on a substrate. The method includes placing a surface of one of the discrete pads in registration with a first chamber of a set of chambers of a smoothing tool, the set corresponding to a smoothing cycle of the smoothing tool; etching, within the first chamber, a surface of one of the discrete pads to form an etch layer on the surface; placing the surface in registration with a second chamber of the set; after the etch, pumping gas and vapor from the surface within the second chamber; placing the surface in registration with a third chamber of the set; and applying heating to the surface in the third chamber to smooth the surface.
    Type: Application
    Filed: June 10, 2020
    Publication date: April 8, 2021
    Applicant: Intel Corporation
    Inventors: Khaled Ahmed, Thomas L. Sounart
  • Patent number: 10969574
    Abstract: Embodiments of the invention include a piezo-electric mirror in an microelectronic package and methods of forming the package. According to an embodiment the microelectronic package may include an organic substrate with a cavity formed in the organic substrate. In some embodiments, an actuator is anchored to the organic substrate and extends over the cavity. For example, the actuator may include a first electrode and a piezo-electric layer formed on the first electrode. A second electrode may be formed on the piezo-electric layer. Additionally, a mirror may be formed on the actuator. Embodiments allow for the piezo-electric layer to be formed on an organic package substrate by using low temperature crystallization processes. For example, the piezo-electric layer may be deposited in an amorphous state. Thereafter, a laser annealing process that includes a pulsed laser may be used to crystallize the piezo-electric layer.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Sasha N. Oster, Feras Eid, Johanna M. Swan, Shawna M. Liff, Aleksandar Aleksov, Thomas L. Sounart, Baris Bicen, Valluri R. Rao
  • Patent number: 10969576
    Abstract: Disclosed herein are maskless imaging tools and display systems that include piezoelectrically actuated mirrors and methods of forming such devices. The maskless imaging tool may include a light source. Additionally, the tool may include one or more piezoelectrically actuated mirrors for receiving light from the light source. The piezoelectrically actuated mirrors are actuatable about one or more axes to reflect the light from the light source to a workpiece positioned to receive light from the piezoelectrically actuated mirror. Disclosed herein is a maskless imaging tool that is a laser direct imaging lithography (LDIL) tool. The maskless imaging tool may also be a via-drill tool. Disclosed herein is also a piezoelectrically actuated mirror used in a projection system. For example, the projection system may be integrated into a pair of glasses.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Feras Eid, Sasha N. Oster, Shawna M. Liff, Johanna M. Swan, Thomas L. Sounart, Baris Bicen, Valluri R. Rao
  • Patent number: 10937594
    Abstract: Embodiments of the invention include a microelectronic device that includes a plurality of organic dielectric layers and a capacitor formed in-situ with at least one organic dielectric layer of the plurality of organic dielectric layers. The capacitor includes first and second conductive electrodes and an ultra-high-k dielectric layer that is positioned between the first and second conductive electrodes.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Thomas L. Sounart, Aleksandar Aleksov, Feras Eid, Georgios C. Dogiamis, Johanna M. Swan, Kristof Darmawikarta
  • Patent number: 10921349
    Abstract: Embodiments of the invention include a current sensing device for sensing current in an organic substrate. The current sensing device includes a released base structure that is positioned in proximity to a cavity of the organic substrate and a piezoelectric film stack that is positioned in proximity to the released base structure. The piezoelectric film stack includes a piezoelectric material in contact with first and second electrodes. A magnetic field is applied to the current sensing device and this causes movement of the released base structure and the piezoelectric stack which induces a voltage (potential difference) between the first and second electrodes.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Adel A. Elsherbini, Shawna M. Liff, Johanna M. Swan, Jelena Culic-Viskota, Thomas L. Sounart, Feras Eid, Sasha N. Oster
  • Patent number: 10840430
    Abstract: Embodiments of the invention include a sensing device that includes a base structure having a proof mass that is positioned in proximity to a cavity of an organic substrate, a piezoelectric material in contact with a first electrode of the base structure, and a second electrode in contact with the piezoelectric material. The proof mass deflects in response to application of an external force or acceleration and this deflection causes a stress in the piezoelectric material which generates a voltage differential between the first and second electrodes.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: November 17, 2020
    Assignee: Intel Corporation
    Inventors: Feras Eid, Sasha N. Oster, Georgios C. Dogiamis, Shawna M. Liff, Adel A. Elsherbini, Thomas L. Sounart, Johanna M. Swan
  • Patent number: 10816733
    Abstract: Embodiments of the invention include an optical routing device that includes an organic substrate. According to an embodiment, an array of cavities are formed into the organic substrate and an array of piezoelectrically actuated mirrors may be anchored to the organic substrate with each piezoelectrically actuated mirror extending over a cavity. In order to properly rout incoming optical signals, the optical routing device may also include a routing die mounted on the organic substrate. The routing die may be electrically coupled to each of the piezoelectrically actuated mirrors and is able to generated a voltage across the first and second electrodes of each piezoelectrically actuated mirror. Additionally, a photodetector may be electrically coupled to the routing die. According to an embodiment, an array of fiber optic cables may be optically coupled with one of the piezoelectrically actuated mirrors and optically coupled with the photodetector.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: October 27, 2020
    Assignee: Intel Corporation
    Inventors: Sasha N. Oster, Johanna M. Swan, Feras Eid, Thomas L. Sounart, Aleksandar Aleksov, Shawna M. Liff, Baris Bicen, Valluri R. Rao
  • Publication number: 20200303611
    Abstract: A micro-light emitting diode (LED) display and a method of fabricating the same. The method includes aligning a display backplane and a source semiconductor wafer with one another. A plurality of backplane contact pads of a first width are fixed to the backplane and include first solder pads thereon with a second width smaller than the first width. The wafer includes thereon a plurality of micro-LEDs, and a plurality of micro-LED contact pads fixed to the micro-LEDs and having a third width smaller than the first width. The method includes: aligning such that at least some of the micro-LED contact pads register with corresponding first solder pads; releasing at least some of the micro-LEDs from the wafer onto corresponding first solder pads; and forming a plurality of second solder pads by melting the corresponding first solder pads.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 24, 2020
    Applicant: Intel Corporation
    Inventors: Thomas L. Sounart, Khaled Ahmed, Anup Pancholi, Shawna M. Liff
  • Patent number: 10721568
    Abstract: Embodiments of the invention include an acoustic transducer device having a base structure that is positioned in proximity to a cavity of an organic substrate, a piezoelectric material in contact with a first electrode of the base structure, and a second electrode in contact with the piezoelectric material. In one example, for a transmit mode, a voltage signal is applied between the first and second electrodes and this causes a stress in the piezoelectric material which causes a stack that is formed with the first electrode, the piezoelectric material, and the second electrode to vibrate and hence the base structure to vibrate and generate acoustic waves.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Feras Eid, Adel A. Elsherbini, Johanna Swan, Shawna M. Liff, Thomas L. Sounart, Sasha N. Oster
  • Publication number: 20200168402
    Abstract: Embodiments of the invention include a microelectronic device that includes a plurality of organic dielectric layers and a piezoelectrically actuated tunable capacitor having a variable capacitance formed in-situ with at least one organic dielectric layer of the plurality of organic dielectric layers. A piezoelectric actuator of the tunable capacitor includes first and second conductive electrodes and a piezoelectric layer that is positioned between the first and second conductive electrodes.
    Type: Application
    Filed: June 27, 2017
    Publication date: May 28, 2020
    Inventors: Feras EID, Aleksandar ALEKSOV, Georgios C. DOGIAMIS, Thomas L. SOUNART, Johanna M. SWAN