Patents by Inventor Thomas L. Stachura
Thomas L. Stachura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8619809Abstract: Provided are a method, system, and program for managing data transmissions at a local network device communicating with a linked network device over a network, wherein each network device is capable of transmitting data at different speeds. An operation is initiated to change a current transmission speed at which data is transmitted between the local and linked network devices in response to a speed change event. A determination is made of a new transmission speed different from the current transmission speed. A register is set in the local network device to indicate the new transmission speed. A speed change request and the new transmission speed are transmitted to the linked network device to cause the local and linked network devices to communicate at the new transmission speed, wherein the transmission occurs without terminating a linked exchange occurring between the local and linked network devices.Type: GrantFiled: September 6, 2011Date of Patent: December 31, 2013Assignee: Intel CorporationInventors: David L. Chalupsky, James M. Ostrowski, Thomas L. Stachura
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Patent number: 8239568Abstract: In one embodiment, a method is provided. The method of this embodiment provides accessing a packet template in a memory, the packet template having at least one static field, and in response to an indication of an event, generating a packet on an integrated circuit, the packet being based on the packet template.Type: GrantFiled: November 12, 2003Date of Patent: August 7, 2012Assignee: Intel CorporationInventors: Thomas L. Stachura, Anil Vasudevan
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Publication number: 20110317716Abstract: Provided are a method, system, and program for managing data transmissions at a local network device communicating with a linked network device over,a network, wherein each network device is capable of transmitting data at different speeds. An operation is initiated to change a current transmission speed at which data is transmitted between the local and linked network devices in response to a speed change event. A determination is made of a new transmission speed different from the current transmission speed. A register is set in the local network device to indicate the new transmission speed. A speed change request and the new transmission speed are transmitted to the linked network device to cause the local and linked network devices to communicate at the new transmission speed, wherein the transmission occurs without terminating a linked exchange occurring between the local and linked network devices.Type: ApplicationFiled: September 6, 2011Publication date: December 29, 2011Inventors: David L. Chalupsky, James M. Ostrowski, Thomas L. Stachura
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Patent number: 8019887Abstract: Provided are a method, system, and program for managing data transmissions at a local network device communicating with a linked network device over a network, wherein each network device is capable of transmitting data at different speeds. An operation is initiated to change a current transmission speed at which data is transmitted between the local and linked network devices in response to a speed change event. A determination is made of a new transmission speed different from the current transmission speed. A register is set in the local network device to indicate the new transmission speed. A speed change request and the new transmission speed are transmitted to the linked network device to cause the local and linked network devices to communicate at the new transmission speed, wherein the transmission occurs without terminating a linked exchange occurring between the local and linked network devices.Type: GrantFiled: September 4, 2003Date of Patent: September 13, 2011Assignee: Intel CorporationInventors: David L. Chalupsky, James M. Ostrowski, Thomas L. Stachura
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Patent number: 7318089Abstract: A method and apparatus for performing network-based control functions on an alert-enabled managed client. An alert proxy translates generic, management-based command data received from a management application/agent into specific client-based hardware control data. The alert proxy transmits a data packet containing the hardware control data over a network to an alert-enabled managed client. Alert hardware within the alert-enabled managed client parses the hardware control data into control bits and utilizes the control bits to set or clear registers within the alert-enabled managed client so as to effectuate the specified control operations. The control operations may be performed on the alert-enabled managed client independent of the operational status of the alert-enabled managed client's operating system.Type: GrantFiled: September 30, 1999Date of Patent: January 8, 2008Assignee: Intel CorporationInventors: Thomas L. Stachura, Michael K. Cline, Anil Vasudevan
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Patent number: 6963985Abstract: An apparatus, system, method and product for automatically transitioning the physical layer interface of a peripheral device to a low power state when a signal is detected by the communication device on a peripheral bus. The technique may include transitioning to different low power states depending upon whether wake up of the device has been enabled by an operating system.Type: GrantFiled: February 22, 2002Date of Patent: November 8, 2005Assignee: Intel CorporationInventors: Thomas L. Stachura, Gregory V. Gritton, David C. Chalupsky
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Patent number: 6915424Abstract: A method and apparatus for preventing theft of an organization property is disclosed. In one embodiment, the method and apparatus authenticates the ownership of an organization property by comparing stored identification information with collected identification information of the organization property. Then the method and apparatus transmits multiple types of network packets containing such authentication result to organization servers via a network.Type: GrantFiled: June 1, 2000Date of Patent: July 5, 2005Assignee: Intel CorporationInventors: Thomas L. Stachura, Anil Vasudevan
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Publication number: 20040202161Abstract: Briefly, in accordance with one embodiment of the invention, a platform bus interface unit includes circuitry to divide a received network protocol compliant signal packet into signal packets of a smaller size for transmission over a platform bus of at least a portion of the data provided by the network protocol compliant signal packet.Type: ApplicationFiled: May 5, 2004Publication date: October 14, 2004Inventors: Thomas L. Stachura, Carey W. Smith
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Publication number: 20040133676Abstract: A device, such as an Application Specific Integrated Circuit (ASIC) which has access to a memory, such as non-volatile RAM (NVRAM) or Electrically Erasable Programmable Read Only Memory (E2PROM). The device may reside in a PC or on a network interface card for providing an interface between the PC and a network, such as an Ethernet-based network. Software on the PC constructs a base packet or template for an SNMP trap PDU and stores the template into the NVRAM or E2PROM associated with the device. When the device determines the need to generate and send the SNMP trap PDU, the device can, without a CPU and without a full implementation of network layer software stacks, generate the SNMP trap PDU based on the base packet stored in the NVRAM. The device need only insert the non-static data into the packet built from the base packet before sending the packet to a communication controller, such as an Ethernet controller, which subsequently sends the packet over a network, such as the Ethernet-based network.Type: ApplicationFiled: November 12, 2003Publication date: July 8, 2004Inventors: Thomas L. Stachura, Anil Vasudevan
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Patent number: 6754209Abstract: Briefly, in accordance with one embodiment of the invention, a platform bus interface unit includes circuitry to divide a received network protocol compliant signal packet into signal packets of a smaller size for transmission over a platform bus of at least a portion of the data provided by the network protocol compliant signal packet. Briefly, in accordance with another embodiment of the invention, an integrated circuit includes circuitry to transmit over a platform bus at least a portion of the data provided by a network protocol compliant signal packet as signal packets of a smaller size. Briefly, in accordance with still another embodiment of the invention, a method of transmitting at least a portion of the data provided by a network protocol compliant signal packet over a platform bus includes the following. At least a portion of the data provided by the network protocol compliant signal packet is divided into smaller data subsets.Type: GrantFiled: August 28, 1998Date of Patent: June 22, 2004Assignee: Intel CorporationInventors: Thomas L. Stachura, Carey W. Smith
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Patent number: 6671722Abstract: A device, such as an Application Specific Integrated Circuit (ASIC) which has access to a memory, such as non-volatile RAM (NVRAM) or Electrically Erasable Programmable Read Only Memory (E2PROM). The device may reside in a PC or on a network interface card for providing an interface between the PC and a network, such as an Ethernet-based network. Software on the PC constructs a base packet or template for an SNMP trap PDU and stores the template into the NVRAM or E2PROM associated with the device. When the device determines the need to generate and send the SNMP trap PDU, the device can, without a CPU and without a full implementation of network layer software stacks, generate the SNMP trap PDU based on the base packet stored in the NVRAM. The device need only insert the non-static data into the packet built from the base packet before sending the packet to a communication controller, such as an Ethernet controller, which subsequently sends the packet over a network, such as the Ethernet-based network.Type: GrantFiled: July 8, 1999Date of Patent: December 30, 2003Assignee: Intel CorporationInventors: Thomas L. Stachura, Anil Vasudevan
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Patent number: 6629248Abstract: A network includes a host personal computer (PC) that can securely communicate with other PCs connected to the network based on the use of security association information. A power-loss detection circuit receives an input signal indicative of a voltage supply level to the network and outputs an output signal indicative of a change in the voltage supply level. The security association information is stored in a storage device if the output signal from the detection circuit indicates that a change in the voltage supply level, such as a power failure or change in power states, has occurred. The security information or other information can be stored in the storage device while the voltage supply level is falling.Type: GrantFiled: March 30, 2000Date of Patent: September 30, 2003Assignee: Intel CorporationInventors: Thomas L. Stachura, Anil Vasudevan
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Publication number: 20030167413Abstract: An apparatus, system, method and product for automatically transitioning the physical layer interface of a peripheral device to a low power state when a signal is detected by the communication device on a peripheral bus. The technique may include transitioning to different low power states depending upon whether wake up of the device has been enabled by an operating system.Type: ApplicationFiled: February 22, 2002Publication date: September 4, 2003Inventors: Thomas L. Stachura, Gregory V. Gritton, David C. Chalupsky
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Publication number: 20030002676Abstract: A method and apparatus for reestablishing secured communication after a desynchronization event. Secured communication is established between a first device and a second device using synchronized device dependent sequence values. A security sequence value from the first device is stored, preferably on a nonvolatile medium. After a desynchronization event, the first device sends the stored security sequence value to the second device as a resynchronization request. The second device returns the stored security sequence value as security assurance, preferably with a security sequence value from the second device for resynchronization.Type: ApplicationFiled: June 29, 2001Publication date: January 2, 2003Inventors: Thomas L. Stachura, Nicholas A. Colman, Anil Vasudevan
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Patent number: 6292038Abstract: The present invention includes a method and apparatus for smooth transitions (switching) between asynchronous clocks without the occurrence of glitches. In one embodiment the present invention is used when powering up and powering down a computer system and transitioning between a relatively faster primary clock and a slower alternate clock. In another embodiment the present invention is used for transitioning between a relatively faster primary clock to a slower alternate clock to conserve power, for example, when a laptop transitions between use mode and sleep mode.Type: GrantFiled: December 23, 1998Date of Patent: September 18, 2001Assignee: Intel CorporationInventors: Thomas L. Stachura, David L. Chalupsky