Abstract: A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a semiconductor body including a semiconductor substrate and a semiconductor layer on the semiconductor substrate. The semiconductor body has a first main surface and a second main surface opposite to the first main surface along a vertical direction. The vertical power semiconductor device further includes a drift region in the semiconductor body. A first part of the drift region is arranged in the semiconductor substrate. A second part of the drift region is arranged in the semiconductor layer. The vertical power semiconductor device further includes a field stop region arranged in the semiconductor substrate, wherein a doping concentration of the field stop region averaged along the vertical direction is larger than a doping concentration of the drift region averaged along the vertical direction.

Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a silicon carbide semiconductor body and a metal adhesion and barrier structure between the metal structure and the silicon carbide semiconductor body. The metal adhesion and barrier structure includes a layer comprising titanium and tungsten.

Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a silicon carbide semiconductor body and a metal adhesion and barrier structure between the metal structure and the silicon carbide semiconductor body. The metal adhesion and barrier structure includes a layer comprising titanium and tungsten.

Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a semiconductor body and a metal adhesion and barrier structure between the metal structure and the semiconductor body. The metal adhesion and barrier structure includes a first layer having titanium and tungsten, and a second layer having titanium, tungsten, and nitrogen on the first layer having titanium and tungsten.

Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a semiconductor body and a metal adhesion and barrier structure between the metal structure and the semiconductor body. The metal adhesion and barrier structure includes a first layer having titanium and tungsten, and a second layer having titanium, tungsten, and nitrogen on the first layer having titanium and tungsten.

Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.

Abstract: A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a second metal, is placed on the contiguous subsection of the first metal layer. The second metal is harder than the first metal. The second metal layer is structured to form at least two layer regions, which are disposed on the contiguous subsection of the first metal layer. The second metal exhibits a boron-containing or phosphorus-containing metal or a boron-containing or phosphorus-containing metal alloy.

Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.

Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.

Abstract: A semiconductor component and method of making a semiconductor component is disclosed. In one embodiment, the semiconductor component includes a drift region of a first conductivity type, a body region of a second conductivity type, and a trench extending into the body region. A semiconductor region of the first conductivity type is in contact with the drift region and the body region and is arranged at a distance from the trench.

Abstract: A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a second metal, is placed on the contiguous subsection of the first metal layer. The second metal is harder than the first metal. The second metal layer is structured to form at least two layer regions, which are disposed on the contiguous subsection of the first metal layer. The second metal exhibits a boron-containing or phosphorus-containing metal or a boron-containing or phosphorus-containing metal alloy.

Abstract: A semiconductor component and method of making a semiconductor component is disclosed. In one embodiment, the semiconductor component includes a drift region of a first conductivity type, a body region of a second conductivity type, and a trench extending into the body region. A semiconductor region of the first conductivity type is in contact with the drift region and the body region and is arranged at a distance from the trench.

Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.

Abstract: A circuit configuration is used for off-load switching. The circuit configuration can be used as a component in a switch mode power supply, a clocked supply, a voltage regulator, and a lamp switch, wherein the circuit configuration is embodied as an IGBT, especially a field stop IGBT or alternately and additionally as a PT IGBT. A method for using the circuit configuration include three operating modes: in a first operating mode, power for a load is modulated by pulse modulation; in a second operating mode, the power is modulated by changing a switching-on time; and, in a third operating mode, both are implemented.

Abstract: A circuit configuration is used for off-load switching. The circuit configuration can be used as a component in a switch mode power supply, a clocked supply, a voltage regulator, and a lamp switch, wherein the circuit configuration is embodied as an IGBT, especially a field stop IGBT or alternately and additionally as a PT IGBT. A method for using the circuit configuration include three operating modes: in a first operating mode, power for a load is modulated by pulse modulation; in a second operating mode, the power is modulated by changing a switching-on time; and, in a third operating mode, both are implemented.

Abstract: A method for forming a field effect vertical bipolar transistor that includes a semiconductive body that has at its top surface a plurality of emitter zones of one conductivity type, each surrounded by a base zone of the opposite conductivity type, and gate electrodes for creating a channel at the surface through the base zone into the bulk inner portion of the one conduction type and at a bottom surface a collector zone that includes a collector electrode overlying a collector layer of the opposite conduction type overlying a field stop layer heavily doped of the opposite conduction type overlying the inner portion lightly doped of the one conduction type. Each of the collector layer and the field stop layer is less than 2 microns in thickness and the collector layer is used to inject minority carriers into the inner zone when appropriately biased.

Abstract: To markedly reduce wafer warping of semiconductor wafers without weakening the strength of adhesion to substrate materials, a novel back side metallizing system is presented. On a silicon semiconductor body an aluminum layer and a diffusion barrier layer that includes titanium are provided. A titanium nitride layer is incorporated into the titanium layer because it has been demonstrated that the titanium nitride layer can compensate for a large proportion of the wafer warping that occurs. Preferably, the usual tempering for improving the ohmic contact between the aluminum layer and the silicon semiconductor body is not performed after the complete metallizing of the semiconductor body, but rather after a first, thin aluminum layer has been deposited onto the silicon semiconductor body.

Abstract: To markedly reduce wafer warping of semiconductor wafers without weakening the strength of adhesion to substrate materials, a novel back side metallizing system is presented. On a silicon semiconductor body an aluminum layer and a diffusion barrier layer that includes titanium are provided. A titanium nitride layer is incorporated into the titanium layer because it has been demonstrated that the titanium nitride layer can compensate for a large proportion of the wafer warping that occurs. Preferably, the usual tempering for improving the ohmic contact between the aluminum layer and the silicon semiconductor body is not performed after the complete metallizing of the semiconductor body, but rather after a first, thin aluminum layer has been deposited onto the silicon semiconductor body.

Abstract: A semiconductor body is covered by a polysilicon layer having a gate electrode and a contact surface for fastening a gate lead. An integrated ohmic resistor connects the gate electrode to the contact surface.