Patents by Inventor Thomas LENEKE

Thomas LENEKE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10854540
    Abstract: A packaged IC component having a semiconductor body and a printed circuit board. The semiconductor body includes a monolithically integrated circuit and at least two metal contact areas. The printed circuit board has a first and second region and a top and a bottom. At least two formed terminal contacts and two conductive traces are connected to the terminal contacts, and the terminal contacts are designed as contact holes passing through the printed circuit board, and are arranged in the first region of the printed circuit board. The two metal contact areas are connected to the conductive traces by bond wires, and the semiconductor body is implemented as a die. The die is arranged in the second region on the top of the printed circuit board, and the semiconductor body and the bond wires are completely covered with a potting compound on the top of the printed circuit board.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: December 1, 2020
    Assignee: TDK-Micronas GmbH
    Inventors: Joerg Franke, Thomas Leneke
  • Publication number: 20190013267
    Abstract: A packaged IC component having a semiconductor body and a printed circuit board. The semiconductor body includes a monolithically integrated circuit and at least two metal contact areas. The printed circuit board has a first and second region and a top and a bottom. At least two formed terminal contacts and two conductive traces are connected to the terminal contacts, and the terminal contacts are designed as contact holes passing through the printed circuit board, and are arranged in the first region of the printed circuit board. The two metal contact areas are connected to the conductive traces by bond wires, and the semiconductor body is implemented as a die. The die is arranged in the second region on the top of the printed circuit board, and the semiconductor body and the bond wires are completely covered with a potting compound on the top of the printed circuit board.
    Type: Application
    Filed: July 9, 2018
    Publication date: January 10, 2019
    Applicant: TDK-Micronas GmbH
    Inventors: Joerg Franke, Thomas Leneke
  • Patent number: 10026684
    Abstract: An IC package having a semiconductor body that includes a monolithically integrated circuit and at least two metallic contact surfaces. The integrated circuit being connected to the two electrical contact surfaces via printed conductors, and being disposed on a carrier substrate and connected to the carrier substrate in a force-fitting manner. The carrier substrate including at least two terminal contacts that are connected to the two contact surfaces. The semiconductor body and the carrier substrate being covered by a casting compound forming one part of the IC package. A section of each of the two terminal contacts penetrating the IC package. The two terminal contacts being disposed on the carrier substrate, and each terminal contact and the carrier substrate disposed beneath the particular terminal contacts having a hole-like formation. The particular hole-like formation being designed as a through-connection for providing an electrical connection to another electrical component.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: July 17, 2018
    Assignee: TDK-Micronas GmbH
    Inventors: Klaus Heberle, Joerg Franke, Thomas Leneke
  • Publication number: 20180130729
    Abstract: An IC package having a semiconductor body that includes a monolithically integrated circuit and at least two metallic contact surfaces. The integrated circuit being connected to the two electrical contact surfaces via printed conductors, and being disposed on a carrier substrate and connected to the carrier substrate in a force-fitting manner. The carrier substrate including at least two terminal contacts that are connected to the two contact surfaces. The semiconductor body and the carrier substrate being covered by a casting compound forming one part of the IC package. A section of each of the two terminal contacts penetrating the IC package. The two terminal contacts being disposed on the carrier substrate, and each terminal contact and the carrier substrate disposed beneath the particular terminal contacts having a hole-like formation. The particular hole-like formation being designed as a through-connection for providing an electrical connection to another electrical component.
    Type: Application
    Filed: January 5, 2018
    Publication date: May 10, 2018
    Applicant: TDK-Micronas GmbH
    Inventors: Klaus HEBERLE, Joerg FRANKE, Thomas LENEKE
  • Patent number: 9893005
    Abstract: An IC package having a semiconductor body that includes a monolithically integrated circuit and at least two metallic contact surfaces. The integrated circuit being connected to the two electrical contact surfaces via printed conductors, and being disposed on a carrier substrate and connected to the carrier substrate in a force-fitting manner. The carrier substrate including at least two terminal contacts that are connected to the two contact surfaces. The semiconductor body and the carrier substrate being covered by a casting compound forming one part of the IC package. A section of each of the two terminal contacts penetrating the IC package. The two terminal contacts being disposed on the carrier substrate, and each terminal contact and the carrier substrate disposed beneath the particular terminal contacts having a hole-like formation. The particular hole-like formation being designed as a through-connection for providing an electrical connection to another electrical component.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: February 13, 2018
    Assignee: TDK-Micronas GmbH
    Inventors: Klaus Heberle, Joerg Franke, Thomas Leneke
  • Publication number: 20160204055
    Abstract: An IC package having a semiconductor body that includes a monolithically integrated circuit and at least two metallic contact surfaces. The integrated circuit being connected to the two electrical contact surfaces via printed conductors, and being disposed on a carrier substrate and connected to the carrier substrate in a force-fitting manner. The carrier substrate including at least two terminal contacts that are connected to the two contact surfaces. The semiconductor body and the carrier substrate being covered by a casting compound forming one part of the IC package. A section of each of the two terminal contacts penetrating the IC package. The two terminal contacts being disposed on the carrier substrate, and each terminal contact and the carrier substrate disposed beneath the particular terminal contacts having a hole-like formation. The particular hole-like formation being designed as a through-connection for providing an electrical connection to another electrical component.
    Type: Application
    Filed: January 12, 2016
    Publication date: July 14, 2016
    Applicant: Micronas GmbH
    Inventors: Klaus HEBERLE, Joerg FRANKE, Thomas LENEKE