Patents by Inventor Thomas M. Laffey
Thomas M. Laffey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240348457Abstract: In some examples, a virtual manager in an electronic device generates a seed based on a first key stored in a physical security processor of the electronic device. The virtual manager initializes a virtual security processor by providing the seed to the virtual security processor. The electronic device creates, in the virtual security processor, a virtual security processor key based on the seed, and a virtual security processor certificate based on the virtual security processor key. The virtual security processor key is bound to the physical security processor based on the virtual security processor key being generated from the first key stored in the physical security processor. An identity of a virtual entity in the electronic device is included in the virtual security processor certificate.Type: ApplicationFiled: February 21, 2024Publication date: October 17, 2024Inventor: Thomas M. Laffey
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Patent number: 12113907Abstract: Methods and systems for implementing DevID enrollment for hardware redundant Trust Platform Modules (TPMs), are described. A system can include hardware redundancy for management modules, and for TPMs that correspond to each management module. Accordingly, a product can have a dual-TPM configuration, where both modules are associated with the same product. Further, a process that particularly considers the presence of dual-TPMs for creating, issuing, and enrolling DevID certificates is described. The process issues and maintains DevID certificates for each TPM by synchronizing dual sessions that correspond to each TPM. Also, the process accounts for duplicate identification data, for example allowing the certificate authority (CA) to sign certificates for dual-TPMs linked to the same chassis number. The process can include performing validation checks, rendezvous points, and locks to ensure that DevID certificates are successfully issued for each of the dual-TPMs, respectively.Type: GrantFiled: June 23, 2022Date of Patent: October 8, 2024Assignee: Hewlett Packard Enterprise Development LPInventor: Thomas M. Laffey
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Patent number: 12105806Abstract: A computer platform includes a security processor; at least one hardware processor; and a memory. The security processor stores data representing a private platform key. The private platform key is part of an asymmetric pair of keys, and the asymmetric pair of keys includes a public platform key. The memory stores a firmware image. The firmware image includes data representing a root certificate of a public key infrastructure that signs a second certificate that is associated with the computer platform. The second certificate includes the public platform key and binding information binding the second certificate to the computer platform. The firmware image includes instructions that, when executed by the hardware processor(s), cause the hardware processor(s) to access data representing the second certificate and determine whether the second certificate is valid based on the root certificate and the binding information.Type: GrantFiled: January 27, 2022Date of Patent: October 1, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Ludovic Emmanuel Paul Noel Jacquin, Thomas M. Laffey, Darrell Haskell
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Patent number: 12072990Abstract: A process includes a first tenant of a plurality of tenants communicating with a security processor of a computer platform, via a first physical request interface of the security processor, to acquire ownership of a first command execution engine of the security processor associated with the first physical request interface. The process includes a second tenant of the plurality of tenants communicating with the security processor, via a second physical request interface of the security processor, to acquire ownership of a second command execution engine of the security processor associated with the second physical request interface. The process includes the security processor receiving a first request from the first tenant in the first physical interface, and the second processor receiving a second request from the second tenant in the second physical request interface.Type: GrantFiled: October 22, 2021Date of Patent: August 27, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Ludovic Emmanuel Paul Noel Jacquin, Nigel J. Edwards, Thomas M. Laffey, Shiva R. Dasari
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Publication number: 20240236089Abstract: In some examples, a system receives information from electronic devices comprising network devices and computing devices in a computing environment that are subject to attestations of interfaces of the network devices and the computing devices. For each interface of a given computing device being attested, the system verifies that the interface of the given computing device is connected to an interface of a corresponding network device that is being attested. For each interface of a given network device being attested, the system verifies that the interface of the given network device is connected to an interface of a corresponding computing device that is being attested or an interface of another network device that is being attested.Type: ApplicationFiled: October 19, 2022Publication date: July 11, 2024Inventors: Nigel John Edwards, Thomas M. Laffey, Ludovic Emmanuel Paul Noel Jacquin, Sunil James
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Publication number: 20240137363Abstract: In some examples, a system receives information from electronic devices comprising network devices and computing devices in a computing environment that are subject to attestations of interfaces of the network devices and the computing devices. For each interface of a given computing device being attested, the system verifies that the interface of the given computing device is connected to an interface of a corresponding network device that is being attested. For each interface of a given network device being attested, the system verifies that the interface of the given network device is connected to an interface of a corresponding computing device that is being attested or an interface of another network device that is being attested.Type: ApplicationFiled: October 18, 2022Publication date: April 25, 2024Inventors: Nigel John Edwards, Thomas M. Laffey, Ludovic Emmanuel Paul Noel Jacquin, Sunil James
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Patent number: 11861372Abstract: Examples disclosed herein relate to using an integrity manifest certificate to verify the state of a platform. A device identity of a device that has the device identity provisioned and stored in a security co-processor to retrieve an integrity proof from the security co-processor. The device includes at least one processing element, at least one memory device, and a bus including at least one bus device, and wherein the device identity is associated with a device identity certificate signed by a first authority. The integrity proof includes a representation of each of a plurality of hardware components including the at least one processing element, the at least one memory device, the at least one bus device, and a system board and a representation of plurality of firmware components included in the device. The integrity proof is provided to a certification station.Type: GrantFiled: May 16, 2022Date of Patent: January 2, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Ludovic Emmanuel Paul Noel Jacquin, Nigel John Edwards, Thomas M. Laffey
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Publication number: 20230421554Abstract: Examples for identification and authentication of hardware. Techniques may include receiving a node identifier during an initial phase of the node. The node identifier may include an initial unique identifier of the node. The node may receive a latest change identifier during a phase change of the node, wherein the phase change may cause a hierarchical change of the node. The latest change identifier is configured to incorporate a latest unique identifier corresponding to a latest system and one or more unique identifiers corresponding to one or more earlier systems of the node. Further, responsive to the reception of the latest change identifier, delete an earlier change identifier, and the node may send the second change identifier to a management service, in response to a request for authentication of the node by the management service.Type: ApplicationFiled: June 24, 2022Publication date: December 28, 2023Inventors: Gareth David RICHARDS, Christopher Anthony Grant HILLIER, Ludovic Emmanuel Paul Noel JACQUIN, Thomas M. LAFFEY
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Publication number: 20230421389Abstract: A process includes communicating by a first device, with a second device. The communicating includes the first device receiving data from the second device that represents a certificate. The certificate binds a hierarchy of logical identifiers to a cryptographic key. The hierarchy of identifiers includes a first logical identifier that corresponds to a group membership. The process includes authenticating, by the first device, the second device based on the certificate. The process includes allowing, by the first device, a secure connection to be set up between the first device and the second device based on whether the first logical identifier represents that the second device is a member of a first group of devices of which the first device is a member.Type: ApplicationFiled: June 24, 2022Publication date: December 28, 2023Inventors: Christopher Anthony Grant Hillier, Gareth David Richards, Ludovic Emmanuel Paul Noel Jacquin, Thomas M. Laffey
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Publication number: 20230237155Abstract: A computer platform includes a security processor; at least one hardware processor; and a memory. The security processor stores data representing a private platform key. The private platform key is part of an asymmetric pair of keys, and the asymmetric pair of keys includes a public platform key. The memory stores a firmware image. The firmware image includes data representing a root certificate of a public key infrastructure that signs a second certificate that is associated with the computer platform. The second certificate includes the public platform key and binding information binding the second certificate to the computer platform. The firmware image includes instructions that, when executed by the hardware processor(s), cause the hardware processor(s) to access data representing the second certificate and determine whether the second certificate is valid based on the root certificate and the binding information.Type: ApplicationFiled: January 27, 2022Publication date: July 27, 2023Inventors: Ludovic Emmanuel Paul Noel Jacquin, Thomas M. Laffey, Darrell Haskell
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Publication number: 20230129610Abstract: A process includes a first tenant of a plurality of tenants communicating with a security processor of a computer platform, via a first physical request interface of the security processor, to acquire ownership of a first command execution engine of the security processor associated with the first physical request interface. The process includes a second tenant of the plurality of tenants communicating with the security processor, via a second physical request interface of the security processor, to acquire ownership of a second command execution engine of the security processor associated with the second physical request interface. The process includes the security processor receiving a first request from the first tenant in the first physical interface, and the second processor receiving a second request from the second tenant in the second physical request interface.Type: ApplicationFiled: October 22, 2021Publication date: April 27, 2023Inventors: Ludovic Emmanuel Paul Noel Jacquin, Nigel J. Edwards, Thomas M. Laffey, Shiva R. Dasari
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Publication number: 20220329435Abstract: Methods and systems for implementing DevID enrollment for hardware redundant Trust Platform Modules (TPMs), are described. A system can include hardware redundancy for management modules, and for TPMs that correspond to each management module. Accordingly, a product can have a dual-TPM configuration, where both modules are associated with the same product. Further, a process that particularly considers the presence of dual-TPMs for creating, issuing, and enrolling DevID certificates is described. The process issues and maintains DevID certificates for each TPM by synchronizing dual sessions that correspond to each TPM. Also, the process accounts for duplicate identification data, for example allowing the certificate authority (CA) to sign certificates for dual-TPMs linked to the same chassis number. The process can include performing validation checks, rendezvous points, and locks to ensure that DevID certificates are successfully issued for each of the dual-TPMs, respectively.Type: ApplicationFiled: June 23, 2022Publication date: October 13, 2022Inventor: Thomas M. LAFFEY
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Patent number: 11438161Abstract: A method and apparatus for use in a trusted network environment together or separately employ an implicit attestation that a requesting computing resource is in a trusted state before access to a network resource is granted. The method includes: verifying that a requesting computing resource is in a trusted state; accessing the private key using the released key authorization value; and creating a digital signature for the requesting device from the accessed private key. The apparatus may implement the method.Type: GrantFiled: October 31, 2019Date of Patent: September 6, 2022Assignee: Hewlett Packard Enterprise Patent DepartmentInventors: Thomas M. Laffey, Charles F. Clark
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Publication number: 20220276875Abstract: Examples disclosed herein relate to using an integrity manifest certificate to verify the state of a platform. A device identity of a device that has the device identity provisioned and stored in a security co-processor to retrieve an integrity proof from the security co-processor. The device includes at least one processing element, at least one memory device, and a bus including at least one bus device, and wherein the device identity is associated with a device identity certificate signed by a first authority. The integrity proof includes a representation of each of a plurality of hardware components including the at least one processing element, the at least one memory device, the at least one bus device, and a system board and a representation of plurality of firmware components included in the device. The integrity proof is provided to a certification station.Type: ApplicationFiled: May 16, 2022Publication date: September 1, 2022Inventors: Ludovic Emmanuel Paul Noel JACQUIN, Nigel John EDWARDS, Thomas M. LAFFEY
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Patent number: 11405222Abstract: Methods and systems for implementing DevID enrollment for hardware redundant Trust Platform Modules (TPMs), are described. A system can include hardware redundancy for management modules, and for TPMs that correspond to each management module. Accordingly, a product can have a dual-TPM configuration, where both modules are associated with the same product. Further, a process that particularly considers the presence of dual-TPMs for creating, issuing, and enrolling DevID certificates is described. The process issues and maintains DevID certificates for each TPM by synchronizing dual sessions that correspond to each TPM. Also, the process accounts for duplicate identification data, for example allowing the certificate authority (CA) to sign certificates for dual-TPMs linked to the same chassis number. The process can include performing validation checks, rendezvous points, and locks to ensure that DevID certificates are successfully issued for each of the dual-TPMs, respectively.Type: GrantFiled: December 20, 2019Date of Patent: August 2, 2022Assignee: Hewlett Packard Enterprise Development LPInventor: Thomas M. Laffey
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Patent number: 11360784Abstract: Examples disclosed herein relate to using an integrity manifest certificate to verify the state of a platform. A device identity of a device that has the device identity provisioned and stored in a security co-processor to retrieve an integrity proof from the security co-processor. The device includes at least one processing element, at least one memory device, and a bus including at least one bus device, and wherein the device identity is associated with a device identity certificate signed by a first authority. The integrity proof includes a representation of each of a plurality of hardware components including the at least one processing element, the at least one memory device, the at least one bus device, and a system board and a representation of plurality of firmware components included in the device. The integrity proof is provided to a certification station.Type: GrantFiled: September 10, 2019Date of Patent: June 14, 2022Assignee: Hewlett Packard Enterprise Development LPInventors: Ludovic Emmanuel Paul Noel Jacquin, Nigel Edwards, Thomas M. Laffey
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Patent number: 11171953Abstract: A technique includes receiving a request from a first electronic device to connect to a network and receiving a first part from the first electronic device. The technique includes regulating onboarding of the first electronic device. Regulating the onboarding includes authenticating the first electronic device. Authenticating the first electronic device includes communicating with a plurality of electronic devices that are connected to the network to receive a set of second secret parts; constructing a first secret from the first secret part and the set of second secret parts; and comparing the first secret to a second secret. Regulating the onboarding of the first electronic device includes allowing the first electronic device to connect to the network based on a result of the comparison.Type: GrantFiled: November 26, 2018Date of Patent: November 9, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Sharath Srikanth Chellappa, Yashavantha Nagaraju Naguvanahalli, Dileep Bangalore Sridhara, Thomas M. Laffey
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Publication number: 20210135872Abstract: A method and apparatus for use in a trusted network environment together or separately employ an implicit attestation that a requesting computing resource is in a trusted state before access to a network resource is granted. The method includes: verifying that a requesting computing resource is in a trusted state; accessing the private key using the released key authorization value; and creating a digital signature for the requesting device from the accessed private key. The apparatus may implement the method.Type: ApplicationFiled: October 31, 2019Publication date: May 6, 2021Inventors: Thomas M. Laffey, Charles F. Clark
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Publication number: 20210073003Abstract: Examples disclosed herein relate to using an integrity manifest certificate to verify the state of a platform. A device identity of a device that has the device identity provisioned and stored in a security co-processor to retrieve an integrity proof from the security co-processor. The device includes at least one processing element, at least one memory device, and a bus including at least one bus device, and wherein the device identity is associated with a device identity certificate signed by a first authority. The integrity proof includes a representation of each of a plurality of hardware components including the at least one processing element, the at least one memory device, the at least one bus device, and a system board and a representation of plurality of firmware components included in the device. The integrity proof is provided to a certification station.Type: ApplicationFiled: September 10, 2019Publication date: March 11, 2021Inventors: Ludovic Emmanuel Paul Noel Jacquin, Nigel Edwards, Thomas M. Laffey
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Patent number: 10885196Abstract: In some examples, in response to a reset of an electronic device, a method disables hardware write locking of a first region in a non-volatile memory, and executes a first boot code portion from the first region to begin a boot procedure. The executed first boot code portion checks whether an update code for the first boot code portion exists. In response to determining that no update code for the first boot code portion exists, the executed first boot code portion causes hardware write locking of the first region. After causing the hardware write locking of the first region, the boot procedure continues, the boot procedure comprising verifying an integrity of a second boot code portion.Type: GrantFiled: April 29, 2016Date of Patent: January 5, 2021Assignee: Hewlett Packard Enterprise Development LPInventor: Thomas M. Laffey