Patents by Inventor Thomas M. Luich

Thomas M. Luich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4942319
    Abstract: A PLA is organized into a plurality of pages of programmable logic arrays, including means for selecting an appropriate set of one or more of the plurality of pages of programmable logic arrays, including means for selecting an appropriate set of one or more of the plurality of pages for operation at any given time. Means are provided for switching pages when necessary in response to input signals including, if desired, signals fed back from the output leads of the PLA, or internal leads within the PLA. By having only a selected one or more of the pages of the PLA operable at any given time, the number of product and sum terms functioning at any given time is significantly less than the total number of product and sum terms available in the device, thereby minimizing power consumption. Furthermore, by utilizing a paged architecture, speed is increased and power consumption reduced since the number of leads connected to, and thus the capacitance of, the product and/or sum term lines is reduced.
    Type: Grant
    Filed: January 19, 1989
    Date of Patent: July 17, 1990
    Assignee: National Semiconductor Corp.
    Inventors: Scott K. Pickett, Thomas M. Luich, Arthur L. Swift, IV
  • Patent number: 4845442
    Abstract: According to the teachings of this invention, a novel sense amplifier is provided which includes a current steering transistor having its emitter connected to the collector of a current mirror transistor, its collector connected to the base of an output transistor, and its base driven by the input signal. With a low input signal, the emitter of the current steering transistor is pulled low, thereby pulling the base of the output transistor low. Conversely, when the input signal is high, and the current steering transistor ceases to operate in the active saturation mode and begins to operate in the inverse active saturation mode, thereby providing current from its base to its collector in order to turn on the output transistor.
    Type: Grant
    Filed: June 13, 1988
    Date of Patent: July 4, 1989
    Assignee: National Semiconductor Corp.
    Inventors: Jay R. Chapin, Thomas M. Luich
  • Patent number: 4763027
    Abstract: A deglitching network for digital logic circuits includes a voltage actuated current source coupled to a linear tracking, constant voltage column clamp circuit. The deglitching network threshold level tracks closely with the predetermined voltage of the column clamp, which also acts as a current sink. When heavy current loads are switched from the column clamp and its voltage falls briefly, the deglitching network is actuated to inject current into the column clamp circuit and restore the preset voltage.
    Type: Grant
    Filed: May 7, 1985
    Date of Patent: August 9, 1988
    Assignee: National Semiconductor Corporation
    Inventor: Thomas M. Luich
  • Patent number: 4734885
    Abstract: A programmable matrix has improved programming circuitry which allows the matrix to be programmed without raising the output terminals or power supply to higher than normal voltage levels. The circuitry includes a bidirectional output buffer and a multi-purpose input pin. The output buffer is provided with a control input and at least one buffer output. A switching device in the buffer provides a path to ground for programming current when a programming enable signal is applied to the control input and a concurrent operating level voltage pulse is applied to a selected buffer output. Programming current may be supplied via a dedicated input pin, but is preferably supplied via the multi-purpose input pin. A higher than normal operating voltage signal applied to the multi-purpose input pin acts to produce the programming enable signal which is subsequently applied to the buffer control input.
    Type: Grant
    Filed: October 17, 1985
    Date of Patent: March 29, 1988
    Assignee: Harris Corporation
    Inventor: Thomas M. Luich
  • Patent number: 4727269
    Abstract: A temperature compensated sense amplifier is connected to the sense node of a memory array which is OR tied to the bit lines of the array. A PNP current mirror supplies voltage independent controlled current to the sense node. A level shifting stage is connected to the sense node to establish a threshold sensing level, and to switch on to steer the current into the amplifier stage. A compensation stage is connected to the level shifting stage and the amplifier stage to compensate for the .beta. factors of the transistors and the resistive changes with temperature. A temperature compensated current sink is connected to the PNP current mirror to track over temperature in opposition therewith and maintain a constant current into the sense node. The level shifting stage and the amplifier stage also include temperature compensating features to provide a sensing threshold which tracks constantly over the operating temperature range.
    Type: Grant
    Filed: August 15, 1985
    Date of Patent: February 23, 1988
    Assignee: Fairchild Camera & Instrument Corporation
    Inventor: Thomas M. Luich