Patents by Inventor Thomas M. Maffitt

Thomas M. Maffitt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Writing multiple levels in a phase change memory
    Patent number: 11152063
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: October 19, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Writing multiple levels in a phase change memory
    Patent number: 10998045
    Abstract: Structures and methods for a multi-bit phase change memory are provided herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: May 4, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Writing multiple levels in a phase change memory
    Patent number: 10943658
    Abstract: Structures and methods for a multi-bit phase change memory, are provided herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: March 9, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Writing multiple levels in a phase change memory
    Patent number: 10937496
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: March 2, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Writing multiple levels in a phase change memory
    Patent number: 10762959
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: September 1, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Writing multiple levels in a phase change memory
    Patent number: 10692576
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: June 23, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20200075097
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 5, 2020
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20200075096
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 5, 2020
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Writing multiple levels in a phase change memory
    Patent number: 10566057
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: February 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Writing multiple levels in a phase change memory
    Patent number: 10535403
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: January 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20190355417
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: July 30, 2019
    Publication date: November 21, 2019
    Inventors: Chung H. LAM, Scott C. LEWIS, Thomas M. MAFFITT, Jack MORRISH
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20190355416
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: July 30, 2019
    Publication date: November 21, 2019
    Inventors: Chung H. LAM, Scott C. LEWIS, Thomas M. MAFFITT, Jack MORRISH
  • Writing multiple levels in a phase change memory
    Patent number: 10424375
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: September 24, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20190267087
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: May 14, 2019
    Publication date: August 29, 2019
    Inventors: Chung H. LAM, Scott C. LEWIS, Thomas M. MAFFITT, Jack MORRISH
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20190267086
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: May 14, 2019
    Publication date: August 29, 2019
    Inventors: Chung H. LAM, Scott C. LEWIS, Thomas M. MAFFITT, Jack MORRISH
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20180277209
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: May 25, 2018
    Publication date: September 27, 2018
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20180277210
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: May 25, 2018
    Publication date: September 27, 2018
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • Phase change memory with an incrementally ramped write-reference voltage and an incrementally ramped read-reference voltage
    Patent number: 10037802
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack Morrish
  • WRITING MULTIPLE LEVELS IN A PHASE CHANGE MEMORY
    Publication number: 20180068725
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Application
    Filed: November 14, 2017
    Publication date: March 8, 2018
    Inventors: Chung H. LAM, Scott C. LEWIS, Thomas M. MAFFITT, Jack MORRISH
  • Writing multiple levels in a phase change memory using a write reference voltage that incrementally ramps over a write period
    Patent number: 9911492
    Abstract: Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: March 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung H. Lam, Scott C. Lewis, Thomas M. Maffitt, Jack R. Morrish