Patents by Inventor Thomas M. McWilliams

Thomas M. McWilliams has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9997495
    Abstract: A non-contacting inductive interconnect of a three-dimensional integrated circuit includes a first silicon substrate having a first inductive loop. A first layer of high permeability material is deposited on the first silicon substrate that has the first inductive loop forming a first high permeability structure. The circuit further includes a second silicon substrate having a second inductive loop. A magnetic coupling is formed between the first inductive loop and the second inductive loop. The first high permeability structure can enhance the magnetic coupling between the first inductive loop and the second inductive loop. In some embodiments, a second layer of the high permeability material is deposited on the second silicon substrate that has the second inductive loop forming a second high permeability structure. The first high permeability structure and the second high permeability structure can form a magnetic circuit coupling the first inductive loop and the second inductive loop.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: June 12, 2018
    Assignee: Elwha LLC
    Inventors: Douglas C. Burger, William Gates, Andrew F. Glew, Roderick A. Hyde, Muriel Y. Ishikawa, Jordin T. Kare, John L. Manferdelli, Thomas M. McWilliams, Craig J. Mundie, Nathan P. Myhrvold, Burton J. Smith, Clarence T. Tegreene, Thomas A. Weaver, Richard T. Witek, Lowell L. Wood, Jr., Victoria Y. H. Wood
  • Patent number: 9893026
    Abstract: Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: February 13, 2018
    Assignee: Elwha LLC
    Inventors: William David Duncan, Roderick A. Hyde, Jordin T. Kare, Thomas M. McWilliams, Thomas Allan Weaver, Lowell L. Wood, Jr.
  • Patent number: 9887177
    Abstract: Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: February 6, 2018
    Assignee: Elwha LLC
    Inventors: William David Duncan, Roderick A. Hyde, Jordin T. Kare, Thomas M. McWilliams, Thomas Allan Weaver, Lowell L. Wood, Jr.
  • Patent number: 9728489
    Abstract: Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: August 8, 2017
    Assignee: ELWHA LLC
    Inventors: William David Duncan, Roderick A. Hyde, Jordin T. Kare, Thomas M. McWilliams, Thomas Allan Weaver, Lowell L. Wood, Jr.
  • Publication number: 20160181227
    Abstract: A non-contacting inductive interconnect of a three-dimensional integrated circuit includes a first silicon substrate having a first inductive loop. A first layer of high permeability material is deposited on the first silicon substrate that has the first inductive loop forming a first high permeability structure. The circuit further includes a second silicon substrate having a second inductive loop. A magnetic coupling is formed between the first inductive loop and the second inductive loop. The first high permeability structure can enhance the magnetic coupling between the first inductive loop and the second inductive loop. In some embodiments, a second layer of the high permeability material is deposited on the second silicon substrate that has the second inductive loop forming a second high permeability structure. The first high permeability structure and the second high permeability structure can form a magnetic circuit coupling the first inductive loop and the second inductive loop.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Applicant: Elwha LLC
    Inventors: Douglas C. Burger, William Gates, Andrew F. Glew, Roderick A. Hyde, Muriel Y. Ishikawa, Jordin T. Kare, John L. Manferdelli, Thomas M. McWilliams, Craig J. Mundie, Nathan P. Myhrvold, Burton J. Smith, Clarence T. Tegreene, Thomas A. Weaver, Richard T. Witek, Lowell L. Wood,, JR., Victoria Y.H. Wood
  • Publication number: 20160126217
    Abstract: Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.
    Type: Application
    Filed: October 29, 2014
    Publication date: May 5, 2016
    Inventors: William David Duncan, Roderick A. Hyde, Jordin T. Kare, Thomas M. McWilliams, Thomas Allan Weaver, Lowell L. Wood, JR.
  • Publication number: 20160128192
    Abstract: Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.
    Type: Application
    Filed: October 29, 2014
    Publication date: May 5, 2016
    Inventors: William David Duncan, Roderick A. Hyde, Jordin T. Kare, Thomas M. McWilliams, Thomas Allan Weaver, Lowell L. Wood, JR.
  • Publication number: 20160128193
    Abstract: Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.
    Type: Application
    Filed: October 29, 2014
    Publication date: May 5, 2016
    Inventors: William David Duncan, Roderick A. Hyde, Jordin T. Kare, Thomas M. McWilliams, Thomas Allan Weaver, Lowell L. Wood, Jr.
  • Patent number: 8780902
    Abstract: A method for balancing load on a network by selecting a path based on a load balancing algorithm and assigning one of several pairs of endpoint addresses for a flow based on the path selected. One pair of endpoint addresses corresponds to a first path and another pair of endpoint addresses corresponds to a second path. If the first path is selected, the first pair of endpoint addresses is assigned to the flow. If the second path is selected, the second pair of endpoint addresses is assigned to the flow. In one embodiment, based on the assigned pair of endpoint address, the flow is switched to an endpoint by the selected path.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: July 15, 2014
    Assignee: Intel Corporation
    Inventors: Ian G. Colloff, Gregory B. Lindahl, Thomas M. Mcwilliams
  • Patent number: 8732386
    Abstract: A Sharing Data Fabric (SDF) causes flash memory attached to multiple compute nodes to appear to be a single large memory space that is global yet shared by many applications running on the many compute nodes. Flash objects stored in flash memory of a home node are copied to an object cache in DRAM at an action node by SDF threads executing on the nodes. The home node has a flash object map locating flash objects in the home node's flash memory, and a global cache directory that locates copies of the object in other sharing nodes. Application programs use an applications-programming interface (API) into the SDF to transparently get and put objects without regard to the object's location on any of the many compute nodes. SDF threads and tables control coherency of objects in flash and DRAM.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: May 20, 2014
    Assignee: Sandisk Enterprise IP LLC.
    Inventors: Brian Walter O'Krafka, Michael John Koster, Darpan Dinker, Earl T. Cohen, Thomas M. McWilliams
  • Patent number: 8667001
    Abstract: A distributed database system has multiple compute nodes each running an instance of a database management system (DBMS) program that accesses database records in a local buffer cache. Records are persistently stored in distributed flash memory on multiple storage nodes. A Sharing Data Fabric (SDF) is a middleware layer between the DBMS programs and the storage nodes and has API functions called by the DBMS programs when a requested record is not present in the local buffer cache. The SDF fetches the requested record from flash memory and loads a copy into the local buffer cache. The SDF has threads on a home storage node that locate database records using a node map. A global cache directory locks and pins records to local buffer caches for updating by a node's DBMS program. DBMS operations are grouped into transactions that are committed or aborted together as a unit.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: March 4, 2014
    Assignee: Sandisk Enterprise IP LLC
    Inventors: Darpan Dinker, Andrew David Eckhardt, Darryl Manabu Ouye, Brian Walter O'Krafka, Earl T. Cohen, Thomas M. McWilliams
  • Patent number: 8667212
    Abstract: A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write buffer for the page-based memory. Software executing on the system uses a node address space which enables access to the page-based memories of all nodes. Each node optionally provides ACID memory properties for at least a portion of the space. In at least a portion of the space, memory elements are mapped to locations in the page-based memory. In various embodiments, some of the elements are compressed, the compressed elements are packed into pages, the pages are written into available locations in the page-based memory, and a map maintains an association between the some of the elements and the locations.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: March 4, 2014
    Assignee: Sandisk Enterprise IP LLC
    Inventors: Thomas M. McWilliams, Earl T. Cohen, James M. Bodwin, Ulrich Bruening
  • Publication number: 20120311246
    Abstract: A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write buffer for the page-based memory. Software executing on the system uses a node address space which enables access to the page-based memories of all nodes. Each node optionally provides ACID memory properties for at least a portion of the space. In at least a portion of the space, memory elements are mapped to locations in the page-based memory. In various embodiments, some of the elements are compressed, the compressed elements are packed into pages, the pages are written into available locations in the page-based memory, and a map maintains an association between the some of the elements and the locations.
    Type: Application
    Filed: August 13, 2012
    Publication date: December 6, 2012
    Inventors: Thomas M. McWilliams, Earl T. Cohen, James M. Bodwin, Ulrich Bruening
  • Publication number: 20120259889
    Abstract: A distributed database system has multiple compute nodes each running an instance of a database management system (DBMS) program that accesses database records in a local buffer cache. Records are persistently stored in distributed flash memory on multiple storage nodes. A Sharing Data Fabric (SDF) is a middleware layer between the DBMS programs and the storage nodes and has API functions called by the DBMS programs when a requested record is not present in the local buffer cache. The SDF fetches the requested record from flash memory and loads a copy into the local buffer cache. The SDF has threads on a home storage node that locate database records using a node map. A global cache directory locks and pins records to local buffer caches for updating by a node's DBMS program. DBMS operations are grouped into transactions that are committed or aborted together as a unit.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Inventors: Darpan Dinker, Andrew David Eckhardt, Darryl Manabu Ouye, Brian Walter O'Krafka, Earl T. Cohen, Thomas M. McWilliams
  • Patent number: 8244969
    Abstract: A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write buffer for the page-based memory. Software executing on the system uses a node address space which enables access to the page-based memories of all nodes. Each node optionally provides ACID memory properties for at least a portion of the space. In at least a portion of the space, memory elements are mapped to locations in the page-based memory. In various embodiments, some of the elements are compressed, the compressed elements are packed into pages, the pages are written into available locations in the page-based memory, and a map maintains an association between the some of the elements and the locations.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: August 14, 2012
    Assignee: Schooner Information Technology, Inc.
    Inventors: Thomas M. McWilliams, Earl T. Cohen, James M. Bodwin, Ulrich Bruening
  • Patent number: 8229945
    Abstract: A distributed database system has multiple compute nodes each running an instance of a database management system (DBMS) program that accesses database records in a local buffer cache. Records are persistently stored in distributed flash memory on multiple storage nodes. A Sharing Data Fabric (SDF) is a middleware layer between the DBMS programs and the storage nodes and has API functions called by the DBMS programs when a requested record is not present in the local buffer cache. The SDF fetches the requested record from flash memory and loads a copy into the local buffer cache. The SDF has threads on a home storage node that locate database records using a node map. A global cache directory locks and pins records to local buffer caches for updating by a node's DBMS program. DBMS operations are grouped into transactions that are committed or aborted together as a unit.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: July 24, 2012
    Assignee: Schooner Information Technology, Inc.
    Inventors: Darpan Dinker, Andrew David Eckhardt, Darryl Manabu Ouye, Brian Walter O'Krafka, Earl T. Cohen, Thomas M. McWilliams
  • Publication number: 20110289263
    Abstract: A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write buffer for the page-based memory. Software executing on the system uses a node address space which enables access to the page-based memories of all nodes. Each node optionally provides ACID memory properties for at least a portion of the space. In at least a portion of the space, memory elements are mapped to locations in the page-based memory. In various embodiments, some of the elements are compressed, the compressed elements are packed into pages, the pages are written into available locations in the page-based memory, and a map maintains an association between the some of the elements and the locations.
    Type: Application
    Filed: May 31, 2011
    Publication date: November 24, 2011
    Inventors: Thomas M. McWilliams, Earl T. Cohen, James M. Bodwin, Ulrich Bruening
  • Patent number: 7975109
    Abstract: A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write buffer for the page-based memory. Software executing on the system uses a node address space which enables access to the page-based memories of all nodes. Each node optionally provides ACID memory properties for at least a portion of the space. In at least a portion of the space, memory elements are mapped to locations in the page-based memory. In various embodiments, some of the elements are compressed, the compressed elements are packed into pages, the pages are written into available locations in the page-based memory, and a map maintains an association between the some of the elements and the locations.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: July 5, 2011
    Assignee: Schooner Information Technology, Inc.
    Inventors: Thomas M. McWilliams, Earl T. Cohen, James M. Bodwin, Ulrich Bruening
  • Patent number: 7903557
    Abstract: A method for balancing load on a network by selecting a path based on a load balancing algorithm and assigning one of several pairs of endpoint addresses for a flow based on the path selected. One pair of endpoint addresses corresponds to a first path and another pair of endpoint addresses corresponds to a second path. If the first path is selected, the first pair of endpoint addresses is assigned to the flow. If the second path is selected, the second pair of endpoint addresses is assigned to the flow. In one embodiment, based on the assigned pair of endpoint address, the flow is switched to an endpoint by the selected path.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: March 8, 2011
    Assignee: QLOGIC, Corporation
    Inventors: Ian G. Colloff, Gregory B. Lindahl, Thomas M. McWilliams
  • Publication number: 20090240869
    Abstract: A Sharing Data Fabric (SDF) causes flash memory attached to multiple compute nodes to appear to be a single large memory space that is global yet shared by many applications running on the many compute nodes. Flash objects stored in flash memory of a home node are copied to an object cache in DRAM at an action node by SDF threads executing on the nodes. The home node has a flash object map locating flash objects in the home node's flash memory, and a global cache directory that locates copies of the object in other sharing nodes. Application programs use an applications-programming interface (API) into the SDF to transparently get and put objects without regard to the object's location on any of the many compute nodes. SDF threads and tables control coherency of objects in flash and DRAM.
    Type: Application
    Filed: August 25, 2008
    Publication date: September 24, 2009
    Applicant: SCHOONER INFORMATION TECHNOLOGY, INC.
    Inventors: Brian Walter O'Krafka, Michael John Koster, Darpan Dinker, Earl T. Cohen, Thomas M. McWilliams