Patents by Inventor Thomas M. Zeng

Thomas M. Zeng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9396011
    Abstract: In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by selectively enabling a hypervisor operating on a computing device during sandbox sessions. In the various aspects, a high-level operating system may allocate memory such that its intermediate physical addresses are equal to the physical addresses. When the hypervisor is disabled, the hypervisor may suspend second stage translations from intermediate physical addresses to physical addresses. During a sandbox session, the hypervisor may be enabled and resume performing second stage translations.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: July 19, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Thomas M. Zeng, Azzedine Touzni, Philip T. Mueller, Jr., Piyush Patel
  • Patent number: 9086813
    Abstract: A wireless mobile device includes a graphic processing unit (GPU) that has a system memory management unit (MMU) for saving and restoring system MMU translation contexts. The system MMU is coupled to a memory and the GPU. The system MMU includes a set of hardware resources. The hardware resources may be context banks, with each of the context banks having a set of hardware registers. The system MMU also includes a hardware controller that is configured to restore a hardware resource associated with an access stream of content issued by an execution thread of the GPU. The associated hardware resource may be restored from the memory into a physical hardware resource when the hardware resource associated with the access stream of content is not stored within one of the hardware resources.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 21, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Thomas M. Zeng, Azzedine Touzni, Thomas Andrew Sartorius
  • Publication number: 20150161057
    Abstract: Systems and methods are disclosed for providing memory address translation for a memory management system. One embodiment of such a system comprises a memory device and an application processor in communication via a system interconnect. The application processor comprises test code for testing one or more of a plurality of hardware devices. Each of the hardware devices has a corresponding system memory management unit (SMMU) for processing memory requests associated with the hardware device to the memory device. The system further comprises a client-side address translation system in communication with the system interconnect and the plurality of SMMUs. The client-side address translation system is configured to selectively route stimulus traffic associated with the test code to a client port on one or more of the plurality of SMMUs for testing the corresponding hardware devices.
    Type: Application
    Filed: January 5, 2014
    Publication date: June 11, 2015
    Applicant: Qualcomm Incorporated
    Inventors: THOMAS M. ZENG, AZZEDINE TOUZNI, STEPHEN A. MOLLOY, SATYAKI MUKHERJEE, ABHIRAMI SENTHILKUMARAN, OLAV HAUGAN, TZUNG REN TZENG, TAREK ZGHAL, JEAN-LOUIS O. TARDIEUX, AJAY UPADHYAYA, ZHURANG ZHAO, PAWAN CHHABRA, SUBRAHMANYAM MOOLA, PAVAN KUMAR, JAYDEEP R. CHOKSHI, VICTOR K. WONG, VIPUL C. GANDHI
  • Publication number: 20140282580
    Abstract: A wireless mobile device includes a graphic processing unit (GPU) that has a system memory management unit (MMU) for saving and restoring system MMU translation contexts. The system MMU is coupled to a memory and the GPU. The system MMU includes a set of hardware resources. The hardware resources may be context banks, with each of the context banks having a set of hardware registers. The system MMU also includes a hardware controller that is configured to restore a hardware resource associated with an access stream of content issued by an execution thread of the GPU. The associated hardware resource may be restored from the memory into a physical hardware resource when the hardware resource associated with the access stream of content is not stored within one of the hardware resources.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventors: Thomas M. Zeng, Azzedine Touzni, Thomas Andrew Sartorius
  • Publication number: 20140282501
    Abstract: In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by selectively enabling a hypervisor operating on a computing device during sandbox sessions. In the various aspects, a high-level operating system may allocate memory such that its intermediate physical addresses are equal to the physical addresses. When the hypervisor is disabled, the hypervisor may suspend second stage translations from intermediate physical addresses to physical addresses. During a sandbox session, the hypervisor may be enabled and resume performing second stage translations.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Thomas M. Zeng, Azzedine Touzni, Philip T. Mueller, JR., Plyush Patel
  • Publication number: 20120124428
    Abstract: A system and method for evaluating programmable device systems captures, categorizes, indexes, manipulates and stores generated embedded trace generated information in an enterprise database. Use cases may be executed on an ETM enabled processor, ETM trace data may be captured, and captured trace data may be manipulated and stored in the enterprise database. The data collected from numerous use cases over multiple executions may be used to generate a differential comparison. The differential comparison may be used to interpret and predict bottlenecks, bugs and irregularities within the programmable device.
    Type: Application
    Filed: November 17, 2010
    Publication date: May 17, 2012
    Inventors: Thomas M. ZENG, Richard A. STEWART
  • Patent number: 6744835
    Abstract: A finite impulse response (FIR) filter employing hybrid coefficients for use in analog-to-digital and digital-to-analog conversion. Clock jitter introduced by the transmission medium may be compensated for by calculating an early interpolated data value and a late interpolated data value for each data point, and using the difference between the early and late interpolated values to produce a correction signal to the slicer clock in the converter. Hardware may be minimized by employing a hybrid coefficient in each filter tab which is reflective of the difference between an early and a late interpolated data value.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: June 1, 2004
    Assignee: Conexant Systems, Inc.
    Inventors: Thomas Mathew Panicker, Thomas M. Zeng