Abstract: A method and apparatus for providing bus arbitrations in a multiprocessor system is disclosed. A computer system includes a common bus that is shared by multiple cores, such as processors. A history of bus requests for the common bus made by the cores is stored in a bus request history table. In response to bus request made by the cores, the common bus is arbitrated according to information stored in the bus request history table by an arbiter.

Abstract: In integrated circuit (IC) designs, a component of power consumed may be represented as Power=½ FCV2, where C is the load capacitance being driven by a source cell, F is the switching frequency of the source cell, and V is the total output voltage swing. However, not every signal value generated by a source cell is required to propagate to all the sink cells connected to the source for every clock cycle of a chip. Accordingly, an isolate cell is inserted in a net (wire) connecting a source cell to at least one sink cell, to de-couple the at least one sink cell and a portion of the net from the source cell when a signal output by the source need not propagate. Due to the de-coupling, the load capacitance associated with the at least one sink and net portion is not experienced by the source cell for such signals. Accordingly, overall IC power consumption is reduced.

Abstract: A method and apparatus for providing bus arbitrations in a multiprocessor system is disclosed. A computer system includes a common bus that is shared by multiple cores, such as processors. A history of bus requests for the common bus made by the cores is stored in a bus request history table. In response to bus request made by the cores, the common bus is arbitrated according to information stored in the bus request history table by an arbiter.

Abstract: In integrated circuit (IC) designs, a component of power consumed may be represented as Power=½ FCV2, where C is the load capacitance being driven by a source cell, F is the switching frequency of the source cell, and V is the total output voltage swing. However, not every signal value generated by a source cell is required to propagate to all the sink cells connected to the source for every clock cycle of a chip. Accordingly, an isolate cell is inserted in a net (wire) connecting a source cell to at least one sink cell, to de-couple the at least one sink cell and a portion of the net from the source cell when a signal output by the source need not propagate. Due to the de-coupling, the load capacitance associated with the at least one sink and net portion is not experienced by the source cell for such signals. Accordingly, overall IC power consumption is reduced.