Patents by Inventor Thomas Moscibroda

Thomas Moscibroda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110231601
    Abstract: Power management functionality is described for implementing an application in an energy-efficient manner, without substantially degrading overall performance of the application. The functionality operates by identifying at least first data and second data associated with the application. The first data is considered to have a greater potential impact on performance of the application compared to the second data. The functionality then instructs a first set of hardware-level resources to handle the first data and a second set of hardware-level resources to handle the second data. The first set of hardware-level resources has a higher reliability compared to the second set of hardware-level resources. In one case, the first and second hardware-level resources comprise DRAM memory units. Here, the first set of hardware-level resources achieves greater reliability than the second set of hardware-level resources by being refreshed at a higher rate than the second set of hardware-level resources.
    Type: Application
    Filed: March 19, 2010
    Publication date: September 22, 2011
    Applicant: Microsoft Corporation
    Inventors: Karthik Pattabiraman, Thomas Moscibroda, Benjamin G. Zom, Song Liu
  • Patent number: 8019862
    Abstract: The described implementations relate to collaborative speed determination in distributed systems. One method estimates upload speeds of a plurality of hosts. The method sends a first bandwidth probe from a first host to a second host. The method receives, at the first host, a second bandwidth probe sent from the second host. The method determines which of the first and second bandwidth probes was relatively slower. The method designates either of the first or second hosts that sent the relatively slower bandwidth probe as a loser and takes a speed of the bandwidth probe of the loser as a first estimate of the loser's upload speed.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: September 13, 2011
    Assignee: Microsoft Corporation
    Inventors: John R. Douceur, James W. Mickens, Thomas Moscibroda, Debmalya Panigrahi
  • Publication number: 20110211517
    Abstract: A “Wi-Fi Multicaster” provides a practical and efficient Wi-Fi multicast system for environments having potentially large numbers of Wi-Fi clients. Significantly, the Wi-Fi Multicaster does not require any changes to the 802.11 protocol, or to the underlying Wi-Fi infrastructure. In various embodiments, the Wi-Fi Multicaster uses pseudo-broadcast, and augments it with destination control, association control and optional proactive FEC (forward error correction) to improve multicast performance. More specifically, the Wi-Fi Multicaster system converts multicast packets to targeted unicast transmissions. To minimize the amount of airtime consumed, the Wi-Fi Multicaster uses destination control in combination with various algorithms for association control. Further, in various embodiments, the Wi-Fi Multicaster includes an adaptive, proactive FEC scheme to reduce overall packet losses. Finally, to overcome the challenges posed by encryption protocols such as 802.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 1, 2011
    Applicant: MICROSOFT CORPORATION
    Inventors: Thomas Moscibroda, Vishnu Navda, Ramachandran Ramjee, Sandeep P. Karanth, Lenin Ravindranath Sivalingam, Jitendra D. Padhye, Ranveer Chandra
  • Patent number: 8001338
    Abstract: Providing for multi-tiered RAM control is provided herein. As an example, a RAM access management system can include multiple input controllers each having a request buffer and request scheduler. Furthermore, a request buffer associated with a controller can vary in size with respect to other buffers. Additionally, request schedulers can vary in complexity and can be optimized at least for a particular request buffer size. As a further example, a first controller can have a large memory buffer and simple scheduling algorithm optimized for scalability. A second controller can have a small memory buffer and a complex scheduler, optimized for efficiency and high RAM performance. Generally, RAM management systems described herein can increase memory system scalability for multi-core parallel processing devices while providing an efficient and high bandwidth RAM interface.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: August 16, 2011
    Assignee: Microsoft Corporation
    Inventors: Thomas Moscibroda, Onur Mutlu
  • Publication number: 20110119456
    Abstract: Dynamically replicated memory is usable to allocate new memory space from failed memory pages by pairing compatible failed memory pages to reuse otherwise unusable failed memory pages. Dynamically replicating memory involves detecting and recording memory faults, reclaiming failed memory pages for later use, recovering from detected memory faults, and scheduling access to replicated memory pages.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 19, 2011
    Applicant: Microsoft Corporation
    Inventors: Engin Ipek, Thomas Moscibroda, Douglas C. Burger, Edmund B. Nightingale, Jeremy P. Condit
  • Publication number: 20110119538
    Abstract: Dynamically replicated memory is usable to allocate new memory space from failed memory pages by pairing compatible failed memory pages to reuse otherwise unusable failed memory pages. Dynamically replicating memory involves detecting and recording memory faults, reclaiming failed memory pages for later use, recovering from detected memory faults, and scheduling access to replicated memory pages.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 19, 2011
    Applicant: Microsoft Corporation
    Inventors: Engin Ipek, Jeremy P. Condit, Edmund B. Nightingale, Douglas C. Burger, Thomas Moscibroda
  • Publication number: 20110032892
    Abstract: Dynamic time-spectrum block allocation for cognitive radio networks is described. In one implementation, without need for a central controller, peer wireless nodes collaboratively sense local utilization of a communication spectrum and collaboratively share white spaces for communication links between the nodes. Sharing local views of the spectrum utilization with each other allows the nodes to dynamically allocate non-overlapping time-frequency blocks to the communication links between the nodes for efficiently utilizing the white spaces. The blocks are sized to optimally pack the available white spaces.
    Type: Application
    Filed: October 18, 2010
    Publication date: February 10, 2011
    Applicant: Microsoft Corporation
    Inventors: Paramvir Bahl, Ranveer Chandra, Thomas Moscibroda, Gopala Sri Hari Narlanka, Yunnan Wu, Yuan Yuan
  • Patent number: 7876786
    Abstract: Dynamic time-spectrum block allocation for cognitive radio networks is described. In one implementation, without need for a central controller, peer wireless nodes collaboratively sense local utilization of a communication spectrum and collaboratively share white spaces for communication links between the nodes. Sharing local views of the spectrum utilization with each other allows the nodes to dynamically allocate non-overlapping time-frequency blocks to the communication links between the nodes for efficiently utilizing the white spaces. The blocks are sized to optimally pack the available white spaces.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: January 25, 2011
    Assignee: Microsoft Corporation
    Inventors: Paramvir Bahl, Ranveer Chandra, Thomas Moscibroda, Gopala Sri Hari Narlanka, Yunnan Wu, Yuan Yuan
  • Publication number: 20100318786
    Abstract: Techniques for utilizing trusted hardware components for mitigating the effects of equivocation amongst participant computing devices of a distributed system are described herein. For instance, a distributed system employing a byzantine-fault-resilient protocol—that is, a protocol intended to mitigate (e.g., tolerate, detect, isolate, etc.) the effects of byzantine faults—may employ the techniques. To do so, the techniques may utilize a trusted hardware component comprising a non-decreasing counter and a key. This hardware component may be “trusted” in that the respective participant computing device cannot modify or observe the contents of the component in any manner other than according to the prescribed procedures, as described herein. Furthermore, the trusted hardware component may couple to the participant computing device in any suitable manner, such as via a universal serial bus (USB) connection or the like.
    Type: Application
    Filed: June 12, 2009
    Publication date: December 16, 2010
    Applicant: Microsoft Corporation
    Inventors: John R. Douceur, David M. Levin, Jacob R. Lorch, Thomas Moscibroda
  • Publication number: 20100304678
    Abstract: Functionality is described by selecting a channel in an environment in which non-privileged entities have subordinate access rights to spectrum compared to privileged entities. The functionality operates by identifying spectrum that is available to all nodes involved in communication (where the nodes are associated with non-privileged entities). The functionality then generates a suitability assessment for each candidate channel within the available spectrum. The functionality selects a channel having the most desirable suitability assessment. The functionality can form a suitability assessment for a candidate channel of arbitrary width, e.g., by combining suitability assessments associated with constituent spectrum units within the candidate channel.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 2, 2010
    Applicant: Microsoft Corporation
    Inventors: Ranveer Chandra, Thomas Moscibroda, Rohan N. Murty, Paramvir Bahl
  • Publication number: 20100301992
    Abstract: Functionality is described for discovering a channel within an environment in which non-privileged entities have subordinate access rights to spectrum compared to privileged entities. The functionality operates by investigating spectrum units within the spectrum for the presence of the channel. In one case, the functionality operates by investigating the spectrum units in linear succession; in another case, the functionality advances in a staggered fashion over the available spectrum. Functionality is also described for handling disconnection by a node from a channel. The functionality allows the node to convey its disconnection status to other communication participants. In one case, various aspects of the functionality are implemented by performing analysis in the time domain.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 2, 2010
    Applicant: Microsoft Corporation
    Inventors: Ranveer Chandra, Thomas Moscibroda, Rohan N. Murty, Paramvir Bahl
  • Publication number: 20100241742
    Abstract: The described implementations relate to collaborative speed determination in distributed systems. One method estimates upload speeds of a plurality of hosts. The method sends a first bandwidth probe from a first host to a second host. The method receives, at the first host, a second bandwidth probe sent from the second host. The method determines which of the first and second bandwidth probes was relatively slower. The method designates either of the first or second hosts that sent the relatively slower bandwidth probe as a loser and takes a speed of the bandwidth probe of the loser as a first estimate of the loser's upload speed.
    Type: Application
    Filed: March 17, 2009
    Publication date: September 23, 2010
    Applicant: Microsoft Corporation
    Inventors: John R. Douceur, James W. Mickens, Thomas Moscibroda, Debmalya Panigrahi
  • Publication number: 20100202449
    Abstract: As microprocessors incorporate more and more devices on a single chip, dedicated buses have given way to on-chip interconnection networks (“OCIN”). Routers in a bufferless OCIN as described herein rank and prioritize flits. Flits traverse a productive path towards their destination or undergo temporary deflection to other non-productive paths, without buffering. Eliminating the buffers of on-chip routers reduces power consumption and heat dissipation while freeing up chip surface area for other uses. Furthermore, bufferless design enables purely local flow control of data between devices in the on-chip network, reducing router complexity and enabling reductions in router latency. Router latency reductions are possible in the bufferless on-chip routing by using lookahead links to send data between on-chip routers contemporaneously with flit traversals.
    Type: Application
    Filed: February 12, 2009
    Publication date: August 12, 2010
    Applicant: Microsoft Corporation
    Inventors: Thomas Moscibroda, Onur Mutlu
  • Publication number: 20100197405
    Abstract: The subject disclosure relates to a method and apparatus for routing data in a network-based computer game via proxy computers. The method and system includes a set of techniques that utilizes the proxy computers to thwart traffic analysis in high-speed games while continuing to satisfy the games' latency requirements. The method and apparatus facilitates thwarting multiple classes of traffic analysis, including inspection of unencrypted header fields, observation of packet size, correlation of packet timing, and collusion among players. A matchmaking system for matching players in a network-based computer game in a manner that resists traffic analysis is also provided.
    Type: Application
    Filed: February 3, 2009
    Publication date: August 5, 2010
    Applicant: Microsoft Corporation
    Inventors: John R. Douceur, Jacob R. Lorch, Daekyeong Moon, Thomas Moscibroda
  • Publication number: 20090323600
    Abstract: The subject invention relates to a system and/or methodology that provide improved wireless networking performance by dynamically adapting the channel width. A dynamic adaptation component adjust the channel width based on at least one characteristic of a wireless network, the characteristics can include but are not limited to range, power consumption, throughput, signal to noise ratio (SNR), resilience to delay spread, data rate, and capacity. Additionally, an optimization component can determine an optimum channel width.
    Type: Application
    Filed: June 27, 2008
    Publication date: December 31, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Ranveer Chandra, Ratul Mahajan, Thomas Moscibroda, Paramvir Bahl, Ramya Raghavendra
  • Publication number: 20090307691
    Abstract: Systems and methods that coordinate operations among a plurality of memory controllers to make a decision for performing an action based in part on state information. A control component facilitates exchange of information among memory controllers, wherein exchanged state information of the memory controllers are further employed to perform computations that facilitate the decision making process.
    Type: Application
    Filed: June 4, 2008
    Publication date: December 10, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Thomas Moscibroda, Onur Mutlu
  • Publication number: 20090216962
    Abstract: A “request scheduler” provides techniques for batching and scheduling buffered thread requests for access to shared memory in a general-purpose computer system. Thread-fairness is provided while preventing short- and long-term thread starvation by using “request batching.” Batching periodically groups outstanding requests from a memory request buffer into larger units termed “batches” that have higher priority than all other buffered requests. Each “batch” may include some maximum number of requests for each bank of the shared memory and for some or all concurrent threads. Further, average thread stall times are reduced by using computed thread rankings in scheduling request servicing from the shared memory. In various embodiments, requests from higher ranked threads are prioritized over requests from lower ranked threads. In various embodiments, a parallelism-aware memory access scheduling policy improves intra-thread bank-level parallelism.
    Type: Application
    Filed: November 5, 2008
    Publication date: August 27, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Onur Mutlu, Thomas Moscibroda
  • Publication number: 20090217273
    Abstract: A “request scheduler” provides techniques for batching and scheduling buffered thread requests for access to shared memory in a general-purpose computer system. Thread-fairness is provided while preventing short- and long-term thread starvation by using “request batching.” Batching periodically groups outstanding requests from a memory request buffer into larger units termed “batches” that have higher priority than all other buffered requests. Each “batch” may include some maximum number of requests for each bank of the shared memory and for some or all concurrent threads. Further, average thread stall times are reduced by using computed thread rankings in scheduling request servicing from the shared memory. In various embodiments, requests from higher ranked threads are prioritized over requests from lower ranked threads. In various embodiments, a parallelism-aware memory access scheduling policy improves intra-thread bank-level parallelism.
    Type: Application
    Filed: February 26, 2008
    Publication date: August 27, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Onur Mutlu, Thomas Moscibroda
  • Publication number: 20090196180
    Abstract: Dynamic time-spectrum block allocation for cognitive radio networks is described. In one implementation, without need for a central controller, peer wireless nodes collaboratively sense local utilization of a communication spectrum and collaboratively share white spaces for communication links between the nodes. Sharing local views of the spectrum utilization with each other allows the nodes to dynamically allocate non-overlapping time-frequency blocks to the communication links between the nodes for efficiently utilizing the white spaces. The blocks are sized to optimally pack the available white spaces.
    Type: Application
    Filed: April 2, 2008
    Publication date: August 6, 2009
    Applicant: Microsoft Corporation
    Inventors: Paramvir Bahl, Ranveer Chandra, Thomas Moscibroda, Gopala Sri Hari Narlanka, Yunnan Wu, Yuan Yuan
  • Publication number: 20090138670
    Abstract: Systems and methodologies for stall-time fair memory access scheduling for shared memory systems are provided herein. A stall-time fairness policy can be applied in accordance with various aspects described herein to schedule memory requests from threads sharing a memory system. To this end, a Stall-Time Fair Memory scheduler (STFM) algorithm can be utilized, wherein memory-related slowdown experienced by a group of threads due to interference from other threads is equalized. Additionally and/or alternatively, a traditional scheduling policy such as first-ready first-come-first-serve (FR-FCFS) can be utilized in combination with a cap on column-over-row reordering of memory requests, thereby reducing the amount of stall-time unfairness imposed by such traditional scheduling policies. Further, various aspects described herein can perform memory scheduling based on thread weights and/or other parameters, which can be configured in hardware and/or software.
    Type: Application
    Filed: March 5, 2008
    Publication date: May 28, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Onur Mutlu, Thomas Moscibroda