Patents by Inventor Thomas N. Dibb
Thomas N. Dibb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11734197Abstract: A method for encrypting and decrypting data, that includes using an encryption key and an address associated with a memory device or a software instance. The method for encrypting and decrypting data may be performed by a hypervisor or by a configured processor. The method may include receiving a read or write request specifying an address; performing a first lookup, in an address mapping table, to identify a memory module address of a memory module associated with the address; performing a second lookup to identify an encryption key associated with the read or write request; generating a decryption or encryption request that includes the memory module address; and the encryption key; and sending the decryption or encryption request to the memory module.Type: GrantFiled: July 31, 2020Date of Patent: August 22, 2023Assignee: EMC IP HOLDING COMPANY LLCInventors: Walter A. O'Brien, III, Thomas N. Dibb
-
Patent number: 11726660Abstract: Techniques providing connectivity between a CPU and physical storage devices (PDs) can use a loop back path formed between two connectors of an extended PO slot when an extended I/O card is inserted therein. The two connectors can include a first connector having connectivity with the CPU over a first set of lanes, and a second connector having connectivity with the PDs over a second set of lanes. While the extended I/O card is inserted into the I/O slot, connectivity can be provided between the CPU and the PDs using connectivity provided between the CPU and the first connector and the first set of lanes; using the loop back path provided between the first and second connectors; and using connectivity provided between the second connector and the PDs over the second set of lanes.Type: GrantFiled: April 15, 2022Date of Patent: August 15, 2023Assignee: Dell Products L.P.Inventors: Aric Hadav, Thomas N. Dibb, Amitai Alkalay
-
Publication number: 20230127240Abstract: A chassis node coupling system includes a chassis node configured to be received at a first end of a chassis assembly, wherein the chassis node size exceeds the chassis assembly size. A latch assembly with one or more coupling assemblies may be configured to releasably couple the chassis node to the chassis assembly.Type: ApplicationFiled: October 22, 2021Publication date: April 27, 2023Inventors: Aric Hadav, Amital Alkalay, Thomas N. Dibb
-
Patent number: 11513699Abstract: A method, computer program product, and computing system for receiving, via a storage processor of a storage system, a write request for writing a data portion to a storage array enclosure of non-volatile memory express (NVMe) drives communicatively coupled to the storage processor, where the write request may be received from a host. The data portion may be written to a persistent memory write cache within the storage array enclosure.Type: GrantFiled: August 1, 2019Date of Patent: November 29, 2022Assignee: EMP IP Holding Company, LLCInventors: Walter A. O'Brien, III, Thomas N. Dibb, Randall H. Shain
-
Patent number: 11397834Abstract: A method for storing encrypted data in a non-volatile memory device, that includes receiving, by a processor, an indication of a power interruption event; disabling, based on the indication, decryption of encrypted data read from a volatile memory module; copying the encrypted data from the volatile memory module to cache; and copying the encrypted data from the cache to the non-volatile memory device.Type: GrantFiled: July 31, 2020Date of Patent: July 26, 2022Assignee: EMC IP Holding Company LLCInventors: Walter A. O'Brien, III, Thomas N. Dibb
-
Publication number: 20220035750Abstract: A method for encrypting and decrypting data, that includes using an encryption key and an address associated with a memory device or a software instance. The method for encrypting and decrypting data may be performed by a hypervisor or by a configured processor. The method may include receiving a read or write request specifying an address; performing a first lookup, in an address mapping table, to identify a memory module address of a memory module associated with the address; performing a second lookup to identify an encryption key associated with the read or write request; generating a decryption or encryption request that includes the memory module address; and the encryption key; and sending the decryption or encryption request to the memory module.Type: ApplicationFiled: July 31, 2020Publication date: February 3, 2022Inventors: Walter A. O'Brien, III, Thomas N. Dibb
-
Publication number: 20220035957Abstract: A method for storing encrypted data in a non-volatile memory device, that includes receiving, by a processor, an indication of a power interruption event; disabling, based on the indication, decryption of encrypted data read from a volatile memory module; copying the encrypted data from the volatile memory module to cache; and copying the encrypted data from the cache to the non-volatile memory device.Type: ApplicationFiled: July 31, 2020Publication date: February 3, 2022Inventors: Walter A. O'Brien, III, Thomas N. Dibb
-
Publication number: 20210279092Abstract: A method, computer program product, and computing system for establishing a connection between a virtualization device and a virtual machine infrastructure. The virtualization device may be configured to be communicatively coupled to one or more PCIe devices. A virtual machine may be executed on the virtual machine infrastructure. Control of the virtualization device may be passed through the virtual machine infrastructure to the virtual machine.Type: ApplicationFiled: May 25, 2021Publication date: September 9, 2021Inventors: Bradley K. Goodman, Thomas N. Dibb
-
Patent number: 11016795Abstract: A method, computer program product, and computing system for establishing a connection between a virtualization device and a virtual machine infrastructure. The virtualization device may be configured to be communicatively coupled to one or more PCIe devices. A virtual machine may be executed on the virtual machine infrastructure. Control of the virtualization device may be passed through the virtual machine infrastructure to the virtual machine.Type: GrantFiled: January 31, 2019Date of Patent: May 25, 2021Assignee: EMC IP Holding Company, LLCInventors: Bradley K. Goodman, Thomas N. Dibb
-
Publication number: 20210034258Abstract: A method, computer program product, and computing system for receiving, via a storage processor of a storage system, a write request for writing a data portion to a storage array enclosure of non-volatile memory express (NVMe) drives communicatively coupled to the storage processor, where the write request may be received from a host. The data portion may be written to a persistent memory write cache within the storage array enclosure.Type: ApplicationFiled: August 1, 2019Publication date: February 4, 2021Inventors: Walter A. O'Brien, III, Thomas N. Dibb, Randall H. Shain
-
Publication number: 20200249971Abstract: A method, computer program product, and computing system for establishing a connection between a virtualization device and a virtual machine infrastructure. The virtualization device may be configured to be communicatively coupled to one or more PCIe devices. A virtual machine may be executed on the virtual machine infrastructure. Control of the virtualization device may be passed through the virtual machine infrastructure to the virtual machine.Type: ApplicationFiled: January 31, 2019Publication date: August 6, 2020Inventors: Bradley K. Goodman, Thomas N. Dibb
-
Patent number: 9910791Abstract: The techniques presented herein provide for initializing and upgrading data encryption capability in a data storage system. The data storage system in initialized to encrypt data writes using a system wide encryption key. A request is received to upgrade the encryption functionality in the data storage system. A data slice is identified for encryption, wherein the data slice is stored in a RAID group in the data storage system. The data slice is pinned in a first cache memory of a first storage processor and persisted in a second cache memory of a second storage processor. The data slice encrypted and a write operation is initiated to write the encrypted data slice back to the RAID group. If the write operation was successful, the data slice is unpinned the first and second cache memory associated with the data slice is freed, else if the write operation was unsuccessful, the data slice is unpinned and the first and second cache memory associated with the data slice are flushed.Type: GrantFiled: June 30, 2015Date of Patent: March 6, 2018Assignee: EMC IP Holding Company LLCInventors: Thomas N. Dibb, Naizhong Chiu, Gregory W. Lazar, Xuan Tang, Millard C. Taylor, II
-
Patent number: 9870481Abstract: The techniques presented herein provide for associating a data encryption lockbox backup with a data storage system. A first set of software system stable values (SSV) is derived from data storage system component values unique to the data storage system. A lockbox storing the first set of SSV and a set of encryption keys associated with a corresponding respective set of data storage system drives is created. Access to the lockbox requires providing a first minimum number of SSV that match corresponding SSV in the first set of SSV. A backup copy of the lockbox is created, wherein access to the backup copy requires providing a second minimum number of SSV that match corresponding SSV in the first set of SSV, wherein the minimum number of SSV is equal to a second match value. The backup copy of the lockbox is stored at a remote location.Type: GrantFiled: September 30, 2014Date of Patent: January 16, 2018Assignee: EMC IP Holding Company LLCInventors: Gregory W. Lazar, Peter Puhov, Millard C. Taylor, III, Naizhong Chiu Qui, Thomas N. Dibb
-
Patent number: 9298636Abstract: A method and a system for use in managing data storage is disclosed. Data storage is managed in a data storage system comprising a first and a second storage processor and a plurality of data storage devices. The first and the second storage processor having respective caches configured to mirror each other. A write I/O is received in the data storage system, wherein the write I/O is an operation for updating data storage in the data storage system. Load associated with the first and second storage processor in the data storage system is determined. The cache is bypassed and write I/O is delivered to the plurality of data storage devices in the data storage system in response to determining a heavy load associated with the first and second storage processor in the data storage system.Type: GrantFiled: September 29, 2011Date of Patent: March 29, 2016Assignee: EMC CorporationInventors: Walter A O'Brien, III, Thomas N Dibb
-
Patent number: 9037793Abstract: A method and a system for use in managing data storage is disclosed. Data storage is managed in a data storage system comprising a first and a second storage processor and a plurality of data storage devices arranged in a RAID configuration, the first and the second storage processor having respective caches configured to mirror each other. A write I/O is received in the data storage system, wherein the write I/O is an operation for updating data storage in the data storage system. Stripe layout in the plurality of data storage devices in the data storage system is established. It is determined whether the write I/O is at least one full stripe write in response to receiving the write I/O and establishing stripe layout. The at least one full stripe write bypasses cache and is delivered to the plurality of data storage devices in the data storage system in response to determining the write I/O is at least one full stripe write.Type: GrantFiled: September 30, 2011Date of Patent: May 19, 2015Assignee: EMC CorporationInventors: Walter A. O'Brien, III, Thomas N. Dibb
-
Patent number: 8103801Abstract: Described is an electronics system and method for marking and faulting I/O ports of an I/O module in the electronics system. Each I/O port has an associated light-emitting system that is capable of emitting a plurality of different colors. At least one color is blinked at a first rate to produce a first status indicator for the I/O port. Each color of the different colors is alternately blinked at a second rate to produce a second status indicator for the I/O port. One of the status indicators is for marking the I/O port and the other status indicator is for faulting the I/O port. In one embodiment, the light-emitting system includes a plurality of differently colored LEDs. In another embodiment, the light-emitting system includes only one multicolor LED. Various I/O technologies including Fiber Channel, Fiber Connectivity, Ethernet, serial attached SCSI, IPsec, Infiniband, and iSCSI, can implement marking and faulting.Type: GrantFiled: September 28, 2007Date of Patent: January 24, 2012Assignee: EMC CorporationInventors: Steven D. Sardella, Stephen Strickland, Thomas N. Dibb