Abstract: Disclosed herein is an aqueous alkaline etching solution comprising water and an alkaline material being selected from the group consisting of ammonium hydroxide, ammonium phosphate, ammonium carbonate, quaternary ammonium hydroxide, quaternary ammonium phosphate, quaternary ammonium carbonate, an alkali metal hydroxide, an alkaline earth metal hydroxide, or a combination comprising at least one of the foregoing alkaline materials; the aqueous alkaline solution being operative to etch aluminum oxide at a rate greater than or equal to about 2:1 over a rate at which it etches a metal oxide semiconductor to be protected; wherein the aqueous etching solution has a pH of 8 to 13.

Abstract: Disclosed herein is an aqueous alkaline etching solution comprising water and an alkaline material being selected from the group consisting of ammonium hydroxide, ammonium phosphate, ammonium carbonate, quaternary ammonium hydroxide, quaternary ammonium phosphate, quaternary ammonium carbonate, an alkali metal hydroxide, an alkaline earth metal hydroxide, or a combination comprising at least one of the foregoing alkaline materials; the aqueous alkaline solution being operative to etch aluminum oxide at a rate greater than or equal to about 2:1 over a rate at which it etches a metal oxide semiconductor to be protected; wherein the aqueous etching solution has a pH of 8 to 13.

Abstract: The present invention discloses plasma enhanced chemical vapor deposition (PECVD) process for depositing n-type and p-type zinc oxide-based transparent conducting oxides (TCOs) at low temperatures with excellent optical and electrical properties on glass and temperature sensitive materials such as plastics and polymers. Specifically, it discloses PECVD process for depositing n-type ZnO by doping it with B or F and p-type ZnO by doping it with nitrogen excellent optical and electrical properties on glass and temperature sensitive materials such as plastics and polymers for TCO application. The process utilizes a mixture of volatile zinc compound, argon and/or helium as a diluent gas, carbon dioxide as an oxidant, and a dopant or reactant to deposit the desired ZnO-based TCOs.

Abstract: An example ultrasound device, such as a transducer array, includes a plurality of ultrasound transducers, each ultrasound transducer having a first electrode, a second electrode, a thin piezoelectric film located between the electrodes, and a substrate supporting the plurality of ultrasound transducers. In some examples, the electrode separation is less than 10 microns, facilitating lower voltage operation than conventional ultrasound transducers.

Abstract: A reconfigurable frequency selective surface (FSS) includes a plurality of conducting patches supported on the surface of a dielectric layer, with selectable electrical interconnections between the conducting patches so as to provide a desired characteristic. The reconfigurable FSS can be used in a reconfigurable artificial magnetic conductor (AMC). A reconfigurable AMC includes a dielectric layer, a conducting back-plane on one surface of the dielectric layer, and a reconfigurable FSS on the other surface of the dielectric layer. A reconfigurable AMC can be used as a dynamically reconfigurable ground plane for a low-profile antenna system.

Abstract: There are disclosed molecular scale devices for performing logic functions. Devices comprise at least one input molecular unit, at least one output molecular unit, at least one molecular unit for performing logic or memory functions, and a means for effecting charge transport. Devices of the invention are useful for a variety of electronic and optoelectronic applications.

Abstract: An antenna comprises an arrangement of electrically conducting segments, the arrangement including intersection points where two or more electrically conducting segments are in electrical communication. Example antennas include a plurality of capacitors located within some or all of the electrically conducting segments. Capacitance values can be determined using an optimization algorithm to obtain desired values of antenna resonance frequency (or frequencies), bandwidth, and/or radiation pattern, and may be adjusted in order to control an antenna parameter such as beam steering direction.

Abstract: Passive or active pixelized antenna structures are described in which the radio-frequency (RF) tuning of individual antenna pixel elements, the connections of individual antenna pixel elements to other antenna elements, and optionally the local phase of individual elements or groups of elements, is varied and controlled using tunable elements. Efficient and low-cost control of a large number of tunable elements is provided by matrix addressing techniques.

Abstract: A reconfigurable frequency selective surface (FSS) includes a plurality of conducting patches supported on the surface of a dielectric layer, with selectable electrical interconnections between the conducting patches so as to provide a desired characteristic. The reconfigurable FSS can be used in a reconfigurable artificial magnetic conductor (AMC). A reconfigurable AMC includes a dielectric layer, a conducting back-plane on one surface of the dielectric layer, and a reconfigurable FSS on the other surface of the dielectric layer. A reconfigurable AMC can be used as a dynamically reconfigurable ground plane for a low-profile antenna system.

Abstract: Passive or active pixelized antenna structures are described in which the radio-frequency (RF) tuning of individual antenna pixel elements, the connections of individual antenna pixel elements to other antenna elements, and optionally the local phase of individual elements or groups of elements, is varied and controlled using tunable elements. Efficient and low-cost control of a large number of tunable elements is provided by matrix addressing techniques.

Abstract: A light emitting device with improved carrier injection. The device has a layer of organic light emitting material and a layer of organic semiconductor material that are interposed between first and second contact layers. A carrier transport layer,may optionally be included between the semiconductor and light emitting layers. When used as a diode, the first and second contacts are functionally the anode and cathode. The device can also be a field effect transistor device by adding a gate contact and a gate dielectric. The first and second contacts then additionally have the function of source and drain, depending on whether the organic semiconductor material is a p-type or an n-type. Preferably, the organic semiconductor is formed with pentacene.

Abstract: There is a method for forming a multilayer electronic device. The method has the following steps: a) depositing a thin molecular layer on an electrically conductive substrate and b) depositing metal atoms or ions on the thin molecular layer at an angle of about 60 degrees or less with respect to the plane of the exposed surface of the thin molecular layer.

Abstract: The present invention provides a process for preparing a patterned organic layer from an unpatterned water-soluble organic layer. The process includes the steps of: imagewise exposing to radiation a photosensitive unpatterned water-soluble organic layer deposited on an organic semiconducting material, a metal or an insulator layer, to produce an imagewise exposed organic layer having exposed and unexposed regions; and contacting the imagewise exposed organic layer and an aqueous-based developer to selectively remove the unexposed regions thereby producing the patterned organic layer. The present invention also provides an improved for fabricating an electronic device having a patterned organic layer adjacent to an organic semiconducting material, metal or insulator layer.

Abstract: An electro-fluidic assembly process for integration of an electronic device or component onto a substrate which comprises: disposing components within a carrier fluid; attracting the components to an alignment sites on the substrate by means of electrophoresis or dielectrophoresis; and aligning the components within the alignment site by means of energy minimization. The substrate comprises: a biased backplane layer, a metal plane layer having one or more alignment sites, a first insulating layer disposed between the backplane layer and the metal plane layer, and a second insulating layer, e.g., benzocyclobute, having a recess disposed therein, wherein the second insulating layer is on the surface of the metal plane layer opposite from the first insulating layer and wherein the recess is in communication with the alignment site.

Abstract: The method of the invention configures a tri-layer thin film transistor (TFT) on a substrate, the TFT including a stack including a gate electrode supported by the substrate, followed by a first layer of insulator, a layer of semiconductor and a second layer of insulator. The method employs a first step of illumination through the substrate, as shadowed by said gate electrode, to enable a patterning of the second layer of insulator into an insulator patch which is aligned with the gate electrode. A next step of illumination through the substrate, as shadowed by said gate electrode, enables a patterning of metallization contacts for the TFT in alignment with the insulator patch.

Abstract: This invention is directed toward a process of manufacturing, including a technique of assembling parts of an apparatus. The technique includes forming electrode structures on a substrate, suspending the apparatus part or parts in a dielectric medium between electrodes of the electrode structure, and using near-field (that is, short range) electric field forces to align the part or parts in pre-determined positions in accordance with the desired apparatus topography. The part or parts may include semiconductor die, nanometer wires for making connections to devices, or other components requiring precision alignment.

Abstract: The present invention is directed to a process for forming one or more lateral nanostructures on a substrate. The process comprises the steps of: providing a substrate; depositing a first layer on the substrate; forming at least one edge on the first layer; depositing at least one separation layer on the first layer; depositing a third layer on the separation layer; and removing a portion of the separation layer and the third layer from the substrate such that a substantially planar surface is formed exposing the first layer, the separation layer, and the third layer.

Abstract: There are disclosed molecular scale devices for performing logic functions. Devices comprise at least one input molecular unit, at least one output molecular unit, at least one molecular unit for performing logic or memory functions, and a means for effecting charge transport. Devices of the invention are useful for a variety of electronic and optoelectronic applications.

Abstract: There is a method for forming a multilayer electronic device. The method has the following steps: a) depositing a thin molecular layer on an electrically conductive substrate and b) depositing metal atoms or ions on the thin molecular layer at an angle of about 60 degrees or less with respect to the plane of the exposed surface of the thin molecular layer.

Abstract: The present invention provides a process for preparing a patterned organic layer from an unpatterned water-soluble organic layer. The process includes the steps of: imagewise exposing to radiation a photosensitive unpatterned water-soluble organic layer deposited on an organic semiconducting material, a metal or an insulator layer, to produce an imagewise exposed organic layer having exposed and unexposed regions; and contacting the imagewise exposed organic layer and an aqueous-based developer to selectively remove the unexposed regions thereby producing the patterned organic layer. The present invention also provides an improved for fabricating an electronic device having a patterned organic layer adjacent to an organic semiconducting material, metal or insulator layer.