Patents by Inventor Thomas Nirshl

Thomas Nirshl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High density memory array for low power application
    Patent number: 7515455
    Abstract: A memory device includes a first bit line in a first conducting layer and a second bit line parallel to the first bit line. The second bit line is in a second conducting layer. The memory device includes a MOS select transistor and a word line coupled to a gate of the MOS select transistor. The word line is at an angle with respect to the first bit line and the second bit line. The memory device includes a first resistive memory element coupled between a source of the MOS select transistor and the first bit line. The memory device includes a second resistive memory element coupled between a drain of the MOS select transistor and the second bit line.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: April 7, 2009
    Assignee: Qimonda North America Corp.
    Inventors: Thomas Nirshl, Thomas Happ