Patents by Inventor Thomas O. Koger

Thomas O. Koger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11301015
    Abstract: A power module for a computer system includes an internal source of stored energy and a group of interface ports, including a management port and non-management ports. The management port provides a control interface to control the power module. The non-management ports each lack the control interface of the management port, and each provide a signal indicating that the power module has a sufficient amount of the stored energy to power a defined operation by external devices coupled to and drawing power from said non-management ports. The management port will typically provide a similar signal to the coupled management device. The signal may be implemented as a high or low voltage level on a serial interface cable pin.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: April 12, 2022
    Assignee: AGIGA TECH INC.
    Inventors: Thomas O Koger, Jeffrey Chang, Torry J Steed, Steven Niu
  • Patent number: 10997300
    Abstract: A method of restoring an encrypted memory image in a system comprising volatile and non-volatile memory initiates a RESTORE of the image from the non-volatile memory to the volatile memory during a BIOS phase of a boot process for the system. If, during an operating system phase, it is determined that the RESTORE failed due to a password error, a password is written to the non-volatile memory and the BIOS phase of the boot process is reinitiated.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: May 4, 2021
    Assignee: AgigA Tech Inc.
    Inventors: Thomas O. Koger, Torry J. Steed
  • Publication number: 20190303582
    Abstract: A method of restoring an encrypted memory image in a system comprising volatile and non-volatile memory initiates a RESTORE of the image from the non-volatile memory to the volatile memory during a BIOS phase of a boot process for the system. If, during an operating system phase, it is determined that the RESTORE failed due to a password error, a password is written to the non-volatile memory and the BIOS phase of the boot process is reinitiated.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 3, 2019
    Inventors: Thomas O. Koger, Torry J. Steed
  • Patent number: 10216685
    Abstract: A memory module is organized into slice sections, each configured to input and output a slice of data for a different section of a data bus. Each slice section includes at least one nonvolatile memory (NVM) and a memory element, such as random access volatile memory, to store the slice of data for the slice section during operations that transfer the slice of data between the section of the data bus for the slice section and the NVM of the slice section. Each slice section also includes a slice controller configured to translate an address for the slice of data for the section of the data bus into a physical address of the NVM of the slice section.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: February 26, 2019
    Assignee: AgigA Tech Inc.
    Inventors: Ronald H Sartore, Thomas O. Koger
  • Publication number: 20180157301
    Abstract: A power module for a computer system includes an internal source of stored energy and a group of interface ports, including a management port and non-management ports. The management port provides a control interface to control the power module. The non-management ports each lack the control interface of the management port, and each provide a signal indicating that the power module has a sufficient amount of the stored energy to power a defined operation by external devices coupled to and drawing power from said non-management ports. The management port will typically provide a similar signal to the coupled management device. The signal may be implemented as a high or low voltage level on a serial interface cable pin.
    Type: Application
    Filed: December 5, 2016
    Publication date: June 7, 2018
    Inventors: Thomas O. Koger, Jeffrey Chang, Torry J. Steed, Steven Niu