Patents by Inventor Thomas O. Morgan

Thomas O. Morgan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7361988
    Abstract: Various methods and apparatuses are described in which a printed circuit board has trace lines. Input/output pads on the printed circuit board may have approximately the same width dimension as a trace line connected to those input/output pads. A first group of vias in the printed circuit board may be aligned into a planar line with a set corridor spacing between adjacent of groups of vias also aligned into a planar line with the same axis to allow a routing space for lines in multiple layers of the printed circuit board to occur in the routing space established by the set corridor spacing.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: April 22, 2008
    Assignee: Intel Corporation
    Inventors: Thomas O. Morgan, James D. Jackson, Weston C. Roth
  • Patent number: 7271349
    Abstract: A protective coating of insulating material is formed around a clearance hole in a conductive layer of a printed circuit board, so that the conductive material in a via within the clearance hole will not contact the conductive layer and create a short circuit. In one embodiment, the protective coating is sufficiently hard to deflect a drill bit being used to drill the via hole, thus protecting against misregistered drilled holes.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: September 18, 2007
    Assignee: Intel Corporation
    Inventors: Rebecca A. Jessep, Terrance J. Dishongh, Carolyn R. McCormick, Thomas O. Morgan
  • Patent number: 7255492
    Abstract: A method includes providing a light pipe having a metallized end surface, and soldering the metallized end surface of the light pipe to a surface of a substrate. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: August 14, 2007
    Assignee: Intel Corporation
    Inventors: Weston C. Roth, Damion T. Searls, Thomas O. Morgan, James D. Jackson
  • Patent number: 7168164
    Abstract: Methods to shield conductive layer from via. A protective coating of insulating material is formed around a clearance hole in a conductive layer of a printed circuit board, so that the conductive material in a via within the clearance hole will not contact the conductive layer and create a short circuit. In one embodiment, the protective coating is sufficiently hard to deflect a drill bit being used to drill the via hole, thus protecting against misregistered drilled holes.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: January 30, 2007
    Assignee: Intel Corporation
    Inventors: Rebecca A. Jessep, Terrance J. Dishongh, Carolyn R. McCormick, Thomas O. Morgan
  • Publication number: 20040238216
    Abstract: A protective coating of insulating material is formed around a clearance hole in a conductive layer of a printed circuit board, so that the conductive material in a via within the clearance hole will not contact the conductive layer and create a short circuit. In one embodiment, the protective coating is sufficiently hard to deflect a drill bit being used to drill the via hole, thus protecting against misregistered drilled holes.
    Type: Application
    Filed: July 8, 2004
    Publication date: December 2, 2004
    Inventors: Rebecca A. Jessep, Terrance J. Dishongh, Carolyn R. McCormick, Thomas O. Morgan
  • Publication number: 20030117772
    Abstract: A method and apparatus to thermally control multiple electronic components, such as field-effect transistors for voltage regulation in processors and chipsets in computers, allow more effective convective cooling by grouping the electronic components in an at least essentially closed loop configuration about a passageway which is open at both ends to permit air flow therethrough. The electronic components form respective side walls of the passageway or are in heat conducting relation with the side walls of a heat sink which forms the passageway. Mounting the electronic components to stand upright off the motherboard allows air to enter below the components and rise up through the passageway producing an increase in air speed and better convective cooling.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Inventors: Damion T. Searls, Terrance J. Dishongh, James D. Jackson, Thomas O. Morgan, Weston C. Roth
  • Patent number: 6580608
    Abstract: A method and apparatus to thermally control multiple electronic components, such as field-effect transistors for voltage regulation in processors and chipsets in computers, allow more effective convective cooling by grouping the electronic components in an at least essentially closed loop configuration about a passageway which is open at both ends to permit air flow therethrough. The electronic components form respective side walls of the passageway or are in heat conducting relation with the side walls of a heat sink which forms the passageway. Mounting the electronic components to stand upright off the motherboard allows air to enter below the components and rise up through the passageway producing an increase in air speed and better convective cooling.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: June 17, 2003
    Assignee: Intel Corporation
    Inventors: Damion T. Searls, Terrance J. Dishongh, James D. Jackson, Thomas O. Morgan, Roth O. Weston
  • Publication number: 20030091730
    Abstract: A protective coating of insulating material is formed around a clearance hole in a conductive layer of a printed circuit board, so that the conductive material in a via within the clearance hole will not contact the conductive layer and create a short circuit. In one embodiment, the protective coating is sufficiently hard to deflect a drill bit being used to drill the via hole, thus protecting against misregistered drilled holes.
    Type: Application
    Filed: September 4, 2002
    Publication date: May 15, 2003
    Inventors: Rebecca A. Jessep, Terrance J. Dishongh, Carolyn R. McCormick, Thomas O. Morgan