Abstract: A method of maintaining an optimum pressure and purity level in a vessel having an inlet gas flow and an outlet gas flow during shutdown of the vessel that prevents imploding of the vessel when the inlet and outlet gas flows are discontinued. Gas from the vessel is directed to a containment portion in communication with the vessel. The pressure of the gas in the containment portion is monitored; the containment portion is backfilled with a purified inert gas when the monitored pressure drops to a predetermined lower level; and the containment portion is vented when the monitored pressure rises to a predetermined higher level. Apparatus for maintaining an optimum pressure and purity level in a vessel having an inlet gas flow and an outlet gas flow during shutdown of the vessel that prevents imploding of the vessel when the inlet and outlet gas flows are discontinued is also provided.

Abstract: A method of maintaining an optimum pressure and purity level in a vessel having an inlet gas flow and an outlet gas flow during shutdown of the vessel that prevents imploding of the vessel when the inlet and outlet gas flows are discontinued. Gas from the vessel is directed to a containment portion in communication with the vessel. The pressure of the gas in the containment portion is monitored; the containment portion is backfilled with a purified inert gas when the monitored pressure drops to a predetermined lower level; and the containment portion is vented when the monitored pressure rises to a predetermined higher level. Apparatus for maintaining an optimum pressure and purity level in a vessel having an inlet gas flow and an outlet gas flow during shutdown of the vessel that prevents imploding of the vessel when the inlet and outlet gas flows are discontinued is also provided.

Abstract: A system and method for growing low defect density epitaxial layers of Si on imperfectly cleaned Si surfaces by either selective or blanket deposition at low temperatures using the APCVD process wherein a first thin, e.g., 10 nm, layer of Si is grown on the surface from silane or disilane, followed by the growing of the remainder of the film from dichlorosilane (DCS) at the same low temperature, e.g., 550.degree. C. to 850.degree. C. The subsequent growth of the second layer with DCS over the first layer, especially if carried out immediately in the very same deposition system, will not introduce additional defects and may be coupled with high and controlled n-type doping which is not available in a silane-based system.

Abstract: A system and method for growing low defect density epitaxial layers of Si on imperfectly cleaned Si surfaces by either selective or blanket deposition at low temperatures using the APCVD process wherein a first thin, e.g., 10 nm, layer of Si is grown on the surface from silane or disilane, followed by the growing of the remainder of the film from dichlorosilane (DCS) at the same low temperature, e.g., 550.degree. C. to 850.degree. C. The subsequent growth of the second layer with DCS over the first layer, especially if carried out immediately in the very same deposition system, will not introduce additional defects and may be coupled with high and controlled n-type doping which is not available in a silane-based system.

Abstract: A method of forming a thin silicon layer upon which semiconductor devices may be constructed. An epitaxial layer is grown on a silicon substrate, and oxygen or nitrogen ions are implanted into the epitaxial layer in order to form a buried etch-stop layer therein. An oxide layer is grown on the epitaxial layer, and is used to form a bond to a mechanical support wafer. The silicon substrate is removed using grinding and/or HNA, the upper portions of the epitaxy are removed using EDP, EPP or KOH, and the etch-stop is removed using a non-selective etch. The remaining portions of the epitaxy forms the thin silicon layer. Due to the uniformity of the implanted ions, the thin silicon layer has a very uniform thickness.

Abstract: The disclosure provides for the use of a group II-VI compound semiconductor as a surface passivator to control recombination of charge carriers at the surface of a group III-V compound semiconductor by a localized heating step. It is theorized for practice of the invention that the control of the recombination of the charge carriers is achieved by chemical reaction of the II-VI compound with excess group V element. In particular the disclosure provides for the use of a capping layer of laser annealed ZnS as a passivating layer on a GaAs device.

Abstract: A chemical vapor deposition (CVD) process is described for depositing magnetic oxides, such as garnets, having growth induced anisotropy sufficient to support stable bubble domains, even in very thin films. Organometallic source compounds are used together with low growth temperatures less than 900.degree. C. and high nozzle velocities in the range of 200-600 cm/sec. at room temperature. The oxidant gas mixture contains about 30-50 mol percent O.sub.2, rather than approximately 100 mol percent O.sub.2, as is usually used in CVD processes for depositing magnetic garnet films. The gas flow is transverse to the plane of the substrate onto which deposition is to occur, and is preferably perpendicular to the plane of the substrate. The individual source compounds are volatilized and carried by an inert gas, combined, then pre-mixed with oxygen in a nozzle without reaction at about 200.degree.-300.degree. C. The gas mixture is then passed at high velocity (200-600 cm/sec) onto a heated substrate.

Abstract: The disclosed method is one which provides an extremely thin substrate upon which there can be laid down a high resolution pattern of material such as metal by an electron beam fabrication technique. The latter technique is one wherein a resist is placed on the surface of the substrate. Thereafter, an electron beam is utilized to expose the resist in the desired pattern. The exposed resist is then removed and the metal or other material is laid down on the locations where the resist has been removed. With the use of the very thin substrate, the amount and effect of electron backscattering is substantially minimized whereby the consequent decrease of resolution due to exposure of the resist with the backscattered electrons is effectively eliminated. Accordingly, the resist exposure can be confined to much narrower widths than heretofore possible with known electron beam fabrication techniques.