Patents by Inventor Thomas Ort

Thomas Ort has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10867934
    Abstract: A microelectronic device may include a substrate, a component, a first plate, a second plate, and a shield. The component may be disposed at least partially within the substrate. The first plate may be disposed on a first side of the component. The second plate may be disposed on a second side of the component. The shield may be disposed around at least a portion of a periphery of the component.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: December 15, 2020
    Assignee: Intel IP Corporation
    Inventors: Saravana Maruthamuthu, Thomas Ort, Andreas Wolter, Andreas Augustin, Veronica Sciriha, Bernd Waidhas
  • Publication number: 20200303274
    Abstract: A semiconductor device and method of including peripheral devices into a package is disclosed. In one example, a peripheral device includes a passive device such as a capacitor or an inductor. Examples are shown that include a peripheral device that is substantially the same thickness as a die or a die assembly. Examples are further shown that use this configuration in a fan out process to form semiconductor devices.
    Type: Application
    Filed: June 5, 2020
    Publication date: September 24, 2020
    Inventors: Lizabeth Keser, Bernd Waidhas, Thomas Ort, Thomas Wagner
  • Publication number: 20200277393
    Abstract: Human antibodies immunospecific for human CD27 are capable of blocking CD27 binding to its ligand CD70 and neutralizing bioactivity of CD27 including, but not limited to, CD27 intracellular signaling, T-cell proliferation and activation, B-cell proliferation and differentiation, plasmablast formation and alleviation of antibody responses, stimulation of tumor cells by CD70, and the production of soluble mediators from T and B-cells. The antibodies are useful in diagnosing or treating CD27 activity associated diseases and conditions.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: John Chen, Johan Fransson, Natalie Fursov, Damon Hamel, Thomas Malia, Galina Obmolova, Tatiana Ort, Michael Rycyzyn, Michael Scully, Raymond Sweet, Alexey Teplyakov, John Wheeler, Juan Carlos Almagro
  • Publication number: 20200251396
    Abstract: A semiconductor device and method is disclosed. Devices shown include a die coupled to an integrated routing layer, wherein the integrated routing layer includes a first width that is wider than the die. Devices shown further included a molded routing layer coupled to the integrated routing layer.
    Type: Application
    Filed: April 22, 2020
    Publication date: August 6, 2020
    Inventors: Lizabeth Keser, Thomas Ort, Thomas Wagner, Bernd Waidhas
  • Patent number: 10720393
    Abstract: An electronic device may include a semiconductor die. The electronic device may include a first routing layer. The first routing layer may be coupled to the semiconductor die. A first plurality of routing traces may be in electrical communication with the semiconductor die. The first plurality of routing traces may be positioned within a first routing footprint. The first routing footprint may have a width greater than a width of the semiconductor die. A second routing layer may be coupled to the first routing layer. A second plurality of routing traces may be in electrical communication with the first plurality of routing traces. The second plurality of routing traces may be positioned within a second routing footprint. The second routing footprint may have a width greater than the width of the first routing footprint.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: July 21, 2020
    Assignee: Intel IP Corporation
    Inventors: Lizabeth Keser, Thomas Ort, Thomas Wagner, Bernd Waidhas
  • Publication number: 20200227388
    Abstract: A semiconductor package includes a first semiconductor die, a semiconductor device comprising a second semiconductor die, and one or more wire bond structures. The wire bond structure includes a bond interface portion. The wire bond structure is arranged next to the first semiconductor die. The first semiconductor die and the bond interface portion of the wire bond structure are arranged at the same side of the semiconductor device. An interface contact structure of the semiconductor device is electrically connected to the wire bond structure.
    Type: Application
    Filed: September 29, 2017
    Publication date: July 16, 2020
    Inventors: Bernd Waidhas, Georg Seidemann, Thomas Wagner, Andreas Wolter, Andreas Augustin, Sonja Koller, Thomas Ort, Reinhard Mahnkopf
  • Patent number: 10699980
    Abstract: A semiconductor device and method of including peripheral devices into a package is disclosed. In one example, a peripheral device includes a passive device such as a capacitor or an inductor. Examples are shown that include a peripheral device that is substantially the same thickness as a die or a die assembly. Examples are further shown that use this configuration in a fan out process to form semiconductor devices.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: June 30, 2020
    Assignee: Intel IP Corporation
    Inventors: Lizabeth Keser, Bernd Waidhas, Thomas Ort, Thomas Wagner
  • Patent number: 10689453
    Abstract: Human antibodies immunospecific for human CD27 are capable of blocking CD27 binding to its ligand CD70 and neutralizing bioactivity of CD27 including, but not limited to, CD27 intracellular signaling, T-cell proliferation and activation, B-cell proliferation and differentiation, plasmablast formation and alleviation of antibody responses, stimulation of tumor cells by CD70, and the production of soluble mediators from T and B-cells. The antibodies are useful in diagnosing or treating CD27 activity associated diseases and conditions.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: June 23, 2020
    Assignee: Janssen Biotech, Inc.
    Inventors: John Chen, Johan Fransson, Natalie Fursov, Damon Hamel, Thomas Malia, Galina Obmolova, Tatiana Ort, Michael Rycyzyn, Michael Scully, Raymond Sweet, Alexey Teplyakov, John Wheeler, Juan Carlos Almagro
  • Patent number: 10665522
    Abstract: A semiconductor device and method is disclosed. Devices shown include a die coupled to an integrated routing layer, wherein the integrated routing layer includes a first width that is wider than the die. Devices shown further included a molded routing layer coupled to the integrated routing layer.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: May 26, 2020
    Assignee: Intel IP Corporation
    Inventors: Lizabeth Keser, Thomas Ort, Thomas Wagner, Bernd Waidhas
  • Publication number: 20200158073
    Abstract: A propeller-type runner for a hydraulic turbine or pump has a hub and a plurality of blades. Up to and including two blades are fixed to the hub using bolts. The remaining blades are welded to the hub. Each bolted blade is adjoined by two welded blades.
    Type: Application
    Filed: April 17, 2018
    Publication date: May 21, 2020
    Inventors: STUART COULSON, SETH SMITH, WALTER RIEGLER, THOMAS ORT
  • Publication number: 20200105678
    Abstract: A face-up fan-out electronic package including at least one passive component located on a support. The electronic package can include a die. The die can include a plurality of conductive pillars having a proximal end communicatively coupled to the first side of the die and a distal end opposite the proximal end. A mold can at least partially surround the die. The mold can include a first surface that is coplanar with the distal end of the conductive pillars and a second surface opposing the first surface. In an example, the passive component can include a body and a lead. The passive component can be located within the mold. The lead can be coplanar with the first surface, and the body can be located at a distance from the second surface. The support can be located between the body and the second surface.
    Type: Application
    Filed: December 4, 2019
    Publication date: April 2, 2020
    Inventors: Lizabeth Keser, Thomas Ort, Thomas Wagner, Bernd Waidhas
  • Patent number: 10546817
    Abstract: A face-up fan-out electronic package including at least one passive component located on a support. The electronic package can include a die. The die can include a plurality of conductive pillars having a proximal end communicatively coupled to the first side of the die and a distal end opposite the proximal end. A mold can at least partially surround the die. The mold can include a first surface that is coplanar with the distal end of the conductive pillars and a second surface opposing the first surface. In an example, the passive component can include a body and a lead. The passive component can be located within the mold. The lead can be coplanar with the first surface, and the body can be located at a distance from the second surface. The support can be located between the body and the second surface.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: January 28, 2020
    Assignee: Intel IP Corporation
    Inventors: Lizabeth Keser, Thomas Ort, Thomas Wagner, Bernd Waidhas
  • Publication number: 20190393154
    Abstract: An electronic device may include a semiconductor die. The electronic device may include a first routing layer. The first routing layer may be coupled to the semiconductor die. A first plurality of routing traces may be in electrical communication with the semiconductor die. The first plurality of routing traces may be positioned within a first routing footprint. The first routing footprint may have a width greater than a width of the semiconductor die. A second routing layer may be coupled to the first routing layer. A second plurality of routing traces may be in electrical communication with the first plurality of routing traces. The second plurality of routing traces may be positioned within a second routing footprint. The second routing footprint may have a width greater than the width of the first routing footprint.
    Type: Application
    Filed: July 1, 2019
    Publication date: December 26, 2019
    Inventors: Lizabeth Keser, Thomas Ort, Thomas Wagner, Bernd Waidhas
  • Publication number: 20190304863
    Abstract: A semiconductor device and method of including peripheral devices into a package is disclosed. In one example, a peripheral device includes a passive device such as a capacitor or an inductor. Examples are shown that include a peripheral device that is substantially the same thickness as a die or a die assembly. Examples are further shown that use this configuration in a fan out process to form semiconductor devices.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 3, 2019
    Inventors: Lizabeth Keser, Bernd Waidhas, Thomas Ort, Thomas Wagner
  • Publication number: 20190304922
    Abstract: A microelectronic device may include a substrate, a component, a first plate, a second plate, and a shield. The component may be disposed at least partially within the substrate. The first plate may be disposed on a first side of the component. The second plate may be disposed on a second side of the component. The shield may be disposed around at least a portion of a periphery of the component.
    Type: Application
    Filed: March 27, 2018
    Publication date: October 3, 2019
    Inventors: Saravana Maruthamuthu, Thomas Ort, Andreas Wolter, Andreas Augustin, Veronica Sciriha, Bernd Waidhas
  • Publication number: 20190290323
    Abstract: A loading tool for loading a biostimulator onto a biostimulator delivery system is described. The loading tool includes a first body portion and a second body portion connected by a hinge. A latch is mounted on the first body portion, and the latch can be locked to fasten the first body portion to the second body portion. A biostimulator can be mounted in the loading tool, and a tether of a biostimulator delivery system can be inserted through a funnel in the loading tool to engage the biostimulator. An operator can use only one hand to unlock the latch, open the loading tool, and remove the loading tool from the biostimulator prior to delivering the biostimulator into a patient. Other embodiments are also described and claimed.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 26, 2019
    Inventors: Byron Liehwah Chun, Sondra Orts, Thomas B. Eby, Stephanie M. Raymond, Mike Sacha, Bernhard Arnar, Adam Weber, Jennifer Heisel, Wade Keller
  • Publication number: 20190275340
    Abstract: A leadless biostimulator including an attachment feature to facilitate precise manipulation during delivery or retrieval is described. The attachment feature can be monolithically formed from a rigid material, and includes a base, a button, and a stem interconnecting the base to the button. The stem is a single post having a transverse profile extending around a central axis. The transverse profile can be annular and can surround the central axis. The leadless biostimulator includes a battery assembly having a cell can that includes an end boss. A tether recess in the end boss is axially aligned with a face port in the button to receive tethers of a delivery or retrieval system through an inner lumen of the stem. The attachment feature can be mounted on and welded to the cell can at a thickened transition region around the end boss. Other embodiments are also described and claimed.
    Type: Application
    Filed: March 8, 2019
    Publication date: September 12, 2019
    Inventors: Thomas B. Eby, Benjamin F. James, IV, Kavous Sahabi, Travis Lieber, Arees Garabed, Craig E. Mar, Sondra Orts, Tyler J. Strang, Jennifer Heisel, Bernhard Arnar, Daniel Coyle, Daniel Goodman, Scott Smith, Scott Kerns, David Rickheim, Adam Weber, Mike Sacha, Byron Liehwah Chun
  • Patent number: 10403580
    Abstract: An electronic device may include a semiconductor die. The electronic device may include a first routing layer. The first routing layer may be coupled to the semiconductor die. A first plurality of routing traces may be in electrical communication with the semiconductor die. The first plurality of routing traces may be positioned within a first routing footprint. The first routing footprint may have a width greater than a width of the semiconductor die. A second routing layer may be coupled to the first routing layer. A second plurality of routing traces may be in electrical communication with the first plurality of routing traces. The second plurality of routing traces may be positioned within a second routing footprint. The second routing footprint may have a width greater than the width of the first routing footprint.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: September 3, 2019
    Assignee: Intel IP Corporation
    Inventors: Lizabeth Keser, Thomas Ort, Thomas Wagner, Bernd Waidhas
  • Publication number: 20190248910
    Abstract: Human antibodies immunospecific for human CD27 are capable of blocking CD27 binding to its ligand CD70 and neutralizing bioactivity of CD27 including, but not limited to, CD27 intracellular signaling, T-cell proliferation and activation, B-cell proliferation and differentiation, plasmablast formation and alleviation of antibody responses, stimulation of tumor cells by CD70, and the production of soluble mediators from T and B-cells. The antibodies are useful in diagnosing or treating CD27 activity associated diseases and conditions.
    Type: Application
    Filed: April 12, 2019
    Publication date: August 15, 2019
    Inventors: John Chen, Johan Fransson, Natalie Fursov, Damon Hamel, Thomas Malia, Galina Obmolova, Tatiana Ort, Michael Rycyzyn, Michael Scully, Raymond Sweet, Alexey Teplyakov, John Wheeler, Juan Carlos Almagro
  • Patent number: D893730
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: August 18, 2020
    Assignee: PACESETTER, INC.
    Inventors: Byron Liehwah Chun, Sondra Orts, Wade Keller, Stephanie M. Raymond, Thomas B. Eby