Abstract: A lockable door hardware assembly for securing a door in closed configuration includes a mortice lock that is coupled to a door. The mortice lock comprises a latch bolt, which in turn comprises a head and a shaft. The head is circumferentially larger than the shaft. A strike plate is mounted to a doorframe in which the door is positioned. A channel extends into the door from an interior surface of the door so that the head of the latch bolt is positioned between the doorframe and the channel when the latch bolt is extended through the strike plate. A rod is selectively insertable into the channel. The rod is positioned to abut the head of the latch bolt to prevent the latch bolt from retracting from the strike plate, thereby rendering the door unlockable from either side of the door.

Abstract: An apparatus for alternate memory addressing of a random access memory (RAM) allows a first processor to write into the memory on a row-by-row basis and a second processor to read out of the memory on a column-by-column basis. The memory is typically divided into a pluralilty of channels into which the first processor writes data for respective channels asynchronously by the use of twin RAMs. While one RAM is written to by the first processor, the second RAM is read from synchronously with automatic address translation.

Abstract: A solid-state telephone trunk interface circuit provides high isolation between a central office and telephone equipment. Opto-isolator transistors and a transformer are used to isolate the central office and the local equipment portions of the circuit. A switching transistor (Q4) is connected between a ring connector (3) and turned on and off via an opto-isolator transistor connected to a control connector (9). A ring detector (11) comprising a first diode bridge is connected between tip and ring connectors (2 and 3) via an opto-isolator transistor to a ring signal connector (13). First and second parallel and opposite sign line condition detectors are respectively connected between tip and ring connectors and via opto-isolator transistors to battery-reverse and battery-forward signal connectors (19 and 17). The voice circuit includes a second diode bridge connecting tip and ring connectors to a first winding of a transformer (T1).

Abstract: A digital voice recording and reproducing device, preferably connected to a telephone network uses a storage RAM to store voice messages and digital signals. An internal processor connected to the storage RAM processes digital signals to and from the storage RAM. A high speed RAM connected to the internal processor receives and transmits digital signals to and from the internal processor. Encoders and decoders encode voice signals into pulse code modulated (PCM) signals to be delivered into the high speed RAM, and decode digital PCM signals from the high speed RAM. A high speed processor (HSP) connected to the high speed RAM delivers signals from a switch to the high speed RAM.