Patents by Inventor Thomas P. Chojnacki

Thomas P. Chojnacki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5196377
    Abstract: Silicon is used to create multi-chip carriers for integrated circuits. The process of fabricating the carriers uses standard integrated circuit fabrication equipment. Cavities are etched into a silicon wafer, metallization or polysilicon is deposited to electrically interconnect the cavities, and integrated circuit die are placed in the cavities. Traces connecting the integrated circuits are buried in channels formed in the silicon, which can be doped and biased to provide enhanced isolation between traces as well as control over the electrical characteristics of the traces. The traces can be formed in multiple layers of material placed on the wafer to provide additional communication capacity in the carriers.
    Type: Grant
    Filed: August 20, 1991
    Date of Patent: March 23, 1993
    Assignee: Cray Research, Inc.
    Inventors: John J. Wagner, Thomas P. Chojnacki, Delvin D. Eberlein