Patents by Inventor Thomas P. Currie

Thomas P. Currie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6651322
    Abstract: An improved rework method and rework wiring structure for repairing and reworking multilayer printed circuit boards utilizing ball grid array (BGA) solder pads are described. The repair method includes the steps of locating a solder pad to be rewired, removing the identified pad, installing a repair wire through a via hole in a multilayer printed circuit board, and forming a replacement solder pad on the end of the repair wire and positioning it in place of the removed pad. Once thus installed, the method includes the step of connecting the other end of the repair wire to a corrected circuit interconnection point.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: November 25, 2003
    Assignee: Unisys Corporation
    Inventor: Thomas P. Currie
  • Patent number: 6443739
    Abstract: An improved rework method and rework wiring structure for repairing and reworking multilayer printed circuit boards utilizing land grid array (LGA) compression contact pads are described. The repair method includes the steps of locating a compression contact pad to be rewired, removing the identified pad, installing a repair wire through a via hole in a multilayer printed circuit board, and forming a replacement compression contact pad on the end of the repair wire and positioning it in place of the removed contact pad. Once thus installed, the method includes the step of connecting the other end of the repair wire to a corrected circuit interconnection point.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: September 3, 2002
    Assignee: Unisys Corporation
    Inventor: Thomas P. Currie
  • Patent number: 5530287
    Abstract: An improved integrated circuit package having high density interconnections between die pads and a plurality of coplanar connector tabs on a selected metal layer in the integrated circuit package, wherein the pitch of the connector tabs is a predetermined multiple of the pitch of the die pads.
    Type: Grant
    Filed: September 14, 1994
    Date of Patent: June 25, 1996
    Assignee: Unisys Corporation
    Inventors: Thomas P. Currie, James H. Rogneby
  • Patent number: 5290970
    Abstract: An improved rework method and rework pin for repairing and reworking multilayer printed circuit boards are described. The rework pin is constructed of conductive material having a configuration that accommodates the configuration of through holes in a multilayer printed circuit board assembly. The rework pin includes a cup-like structure at one end for cooperating with component leads, an elongated electrically insulated portion and an electrically conductive tip portion extending beyond the thickness of the multilayer board.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: March 1, 1994
    Assignee: Unisys Corporation
    Inventor: Thomas P. Currie
  • Patent number: 5162974
    Abstract: A heat sink system for cooling electronic components and especially integrated circuits on a printed circuit board is disclosed. A heat sink having a heat pipe and a plurality of fins spaced and positioned perpendicular to the longitudinal axis of the heat pipe is connected at one end to a heat collector. The surface of the heat collector is urged by a spring biasing mechanism into secure thermal contact with a heat spreader connected to the integrated circuit package. The heat collector consists of two sections. One section is connected to one end of the heat pipe and has a hemispherically shaped end. The other section has an associated mating hemispherically shaped socket and is connected to the heat spreader. The two sections form a hemispherical interface serving both to increase the thermal efficiency of the heat sink and to act as a self-positioning mechanism.
    Type: Grant
    Filed: April 15, 1991
    Date of Patent: November 10, 1992
    Assignee: Unisys Corporation
    Inventor: Thomas P. Currie
  • Patent number: 4561006
    Abstract: An integrated circuit package having an auxiliary heating element incorporated therein is described. The integral heating element is accessible for application of electric power from an external source to cause heating of the integral circuit package to a predetermined level at which solder will melt and flow, thereby allowing removal and reinsertion of the integrated circuit package with relationship to associated pins in a support assembly. The integral heating element provides a means for applying controlled heat to the integrated circuit package such that the package can be unsoldered from or soldered to associated electrical interconnection pins, some of which may be hidden from view or physical access.
    Type: Grant
    Filed: July 6, 1982
    Date of Patent: December 24, 1985
    Assignee: Sperry Corporation
    Inventor: Thomas P. Currie
  • Patent number: 4504156
    Abstract: A cooling system monitoring assembly incorporating a heat generating element for simulating heat generation of components in the system, together with heat sensing element responsive to the heat generating element for providing temperature signals when the temperature of the heat generating element is sensed to have exceeded a predetermined threshold is described, thereby indicating the level of temperature fault. A support assembly is described for supporting the heat generating element in the heat transfer relationship to the monitored cooling system, while supporting the heat sensing element. A system for monitoring a plurality of subassemblies associated with the monitored cooling system and identifying the location of detected temperature fault condition is also described.
    Type: Grant
    Filed: July 6, 1982
    Date of Patent: March 12, 1985
    Assignee: Sperry Corporation
    Inventors: Thomas P. Currie, Terry B. Zbinden
  • Patent number: 4446477
    Abstract: A novel thin film processing substrate is embodied into a multichip hybrid module. The processing substrate is provided with conductive vias which are arranged in an area array having the same pattern as the lead out pin vias on a base substrate. The top surface of the processing substrate is built up by thin film techniques to provide a laminate thereon comprising a ground plane and a plurality of thin film X-direction and Y-direction signal distribution lines separated one from the other by thin polyimide insulating layers. The interconnecting thin film lines and polyimide layers are built up as patterns using photolithographic techniques. The X and Y-direction conductive lines and the ground plane are selectively interconnected through the vias and each other to form a predetermined signal distribution circuit.
    Type: Grant
    Filed: August 21, 1981
    Date of Patent: May 1, 1984
    Assignee: Sperry Corporation
    Inventors: Thomas P. Currie, Norman Goldberg
  • Patent number: 4310811
    Abstract: A rework layer for a multi-layer printed circuit board comprised of a reference layer and a wire network containing a plurality of conductors tailored to match the impedance characteristics existing between the internal layers of the printed circuit board, wherein the conductors can be selectively terminated after fabrication of the printed circuit board.
    Type: Grant
    Filed: March 17, 1980
    Date of Patent: January 12, 1982
    Assignee: Sperry Corporation
    Inventor: Thomas P. Currie