Patents by Inventor Thomas P. Gall

Thomas P. Gall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7570492
    Abstract: An electronic control module comprising a vent assembly is provided. The electronic control module comprises a housing having a first aperture and a substrate disposed within the housing. The substrate has a second aperture positioned adjacent to the first aperture, and includes the hydrophobic vent assembly disposed over the second aperture and adheringly coupled to the substrate. The hydrophobic vent assembly may be adapted to prevent the ingress of moisture and permit the egress of certain gases.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: August 4, 2009
    Assignee: Temic Automotive of North America, Inc.
    Inventors: Thomas P. Gall, Michael Pfeifer, Anthony Polak, Michael J. Pomeroy
  • Patent number: 7353983
    Abstract: A method for vertical removal of excess solder from a circuit substrate includes the use of a sacrificial circuit substrate with a plurality of pads and vias that are solder-wettable. The pads and vias of the sacrificial circuit substrate are placed in vertical proximity to the excess solder of the circuit substrate. The excess solder is heated until it is liquid, wherein the excess solder is wicked vertically onto the pads and into the vias of the sacrificial circuit substrate. Thereafter, the sacrificial circuit substrate is lifted from the proximity of the circuit substrate while the solder is in a liquid, taking the excess solder with it but leaving a predetermined amount on the circuit substrate.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: April 8, 2008
    Assignee: Temic Automotive of North America, Inc.
    Inventors: William C. Weigler, Robert Babula, James E. Herbold, Thomas P. Gall, Steven G. Sharkey
  • Patent number: 7300820
    Abstract: An apparatus and method for an adhesive assembly for securing a printed circuit board to a substrate. The assembly provides a printing tool with a plurality of apertures defined therethrough. Preferably, the apertures have a top opening with a larger area than a bottom opening. The printing tool is placed upon one of the printed circuit board and/or substrate, and a liquid adhesive is printed onto the printing tool. The liquid adhesive forms islands of adhesive within each aperture. Removing the printing tool deforms each island to form a raised edge at a periphery of each island. A temporary liner can be placed on the raised edges to protect the adhesive until the printed circuit board can be assembled with the substrate.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: November 27, 2007
    Assignee: Temic Automotive of North America, Inc.
    Inventors: Jinbao Jiao, Kevin D. Moore, Thomas P. Gall, William C. Weigler
  • Patent number: 7075794
    Abstract: An electronic control unit having a flexible circuit board assembly is disclosed. The electronic control unit comprises a flexible circuit board with at least one layer having first and second portions separated by a bendable region. The electronic control unit further comprises a substantially rigid substrate having first and second portions separated by a bend region and inside and outside surfaces. The first and second portions of the circuit board are affixed to respective first and second portions of the substrate. The bend region has one of the group of a recess and aperture extending outwardly from the inside surface of the substrate with the one of the group of the recess and aperture sized to accept the bendable region of the circuit board.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: July 11, 2006
    Assignee: Motorola, Inc.
    Inventors: Thomas P. Gall, Kevin D. Moore, Timothy J. Trento
  • Patent number: 6927344
    Abstract: A flexible circuit board assembly and method includes a rigid circuit board having a first portion and a second portion separated by a bending region. A plurality of grooves are cut into the bending region. The grooves are cut substantially parallel to an axis about which the bending region is bent. Preferably, the grooves are located on an inside bending radius of the circuit board, but can be located on the outside radius or both.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: August 9, 2005
    Assignee: Motorola, Inc.
    Inventors: Thomas P. Gall, Richard A. Hawkins, Kevin D. Moore
  • Patent number: 6749105
    Abstract: A method for securing a metallic substrate (24) to a metallic housing (26). The method may include: firing a first solderable coating (64) to an edge (60) of the metallic substrate (24); firing a second solderable coating (64) to a groove (62) of the metallic housing (26); joining the edge (60) of the metallic substrate (24) to the groove (62) of the metallic housing (26) to form a joint (66) at the first solderable coating and the second solderable coating; applying a solder (68) to the joint (66); and solder bonding the metallic substrate (24) to the metallic housing (26) to provide a hermetic seal at the joint (66). There is also an electronic control module that incorporates the method.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: June 15, 2004
    Assignee: Motorola, Inc.
    Inventors: Ying Wang, Thomas P. Gall
  • Publication number: 20030178217
    Abstract: A method for securing a metallic substrate (24) to a metallic housing (26). The method may include: firing a first solderable coating (64) to an edge (60) of the metallic substrate (24); firing a second solderable coating (64) to a groove (62) of the metallic housing (26); joining the edge (60) of the metallic substrate (24) to the groove (62) of the metallic housing (26) to form a joint (66) at the first solderable coating and the second solderable coating; applying a solder (68) to the joint (66); and solder bonding the metallic substrate (24) to the metallic housing (26) to provide a hermetic seal at the joint (66). There is also an electronic control module that incorporates the method.
    Type: Application
    Filed: March 21, 2002
    Publication date: September 25, 2003
    Inventors: Ying Wang, Thomas P. Gall
  • Publication number: 20030095388
    Abstract: A multiple cure adhesive (204) is used to secure a circuit substrate (104) to an underlying rigid surface (106). The adhesive is screen printed on the underlying surface. A first cure is then applied to the adhesive to at least partially cure the adhesive and to make the adhesive tacky. The circuit substrate is mounted on the tacky adhesive and a second cure is applied to the adhesive to firmly secure the circuit substrate to the housing. By screen printing the adhesive on the underlying surface, the process of mounting a circuit substrate on a rigid surface can be completely automated, providing cost saving and waste reduction.
    Type: Application
    Filed: November 16, 2001
    Publication date: May 22, 2003
    Inventors: Jinbao Jiao, Thomas P. Gall, Stanton Rak, Kevin D. Moore
  • Patent number: 6501661
    Abstract: An electronic control unit (ECU) includes a flexible circuit substrate having a first partition interconnected to a third partition by a second, flexible partition. The electronic control unit further includes a rigidizer having a first partition interconnected to a third partition by a second partition. When the ECU is twice folded, the second, flexible partition of the circuit substrate assumes an approximate ‘U’-shape, resulting in a reduced cracking and splitting rate than the prior art. In various embodiments of the present invention, the assumption of a ‘U’-shaped fold in the second, flexible partition of the circuit substrate is facilitated by multiple apertures in a second rigidizer partition, by a depression in a second rigidizer partition, or by non-slidably affixing a first circuit substrate partition to a first rigidizer partition via a first adhesive and non-slidably affixing a third circuit substrate partition to a third rigidizer partition via a second adhesive.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: December 31, 2002
    Assignee: Motorola, Inc.
    Inventors: Kevin D. Moore, Thomas P. Gall, Jeffrey Lord
  • Patent number: 6483037
    Abstract: A flexible circuit (100) includes a first circuit path portion (110) and a second rigid circuit path portion (140) to which electronic components (102) may be coupled. Each circuit path portion (110 and 140) including a resin layer (112 and 142) and an adjacent conductive layer (114 and 144). Each circuit path portion (110 and 140) defining a gap (120 and 150) substantially running along a line corresponding to a desired bend location. A central circuit path portion (130) is disposed between the first circuit path portion (110) and the second rigid circuit path portion (140) and includes a first conductive layer (134) in electrical communication with the first circuit path portion (110) and a second conductive layer (136) in electrical communication with the second rigid circuit path portion (140), so as to provide electrical communication across the gaps (120 and 150). A metal plate (160) is disposed adjacent the second rigid circuit path portion (140).
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: November 19, 2002
    Assignee: Motorola, Inc.
    Inventors: Kevin D. Moore, Thomas P. Gall
  • Patent number: 5709805
    Abstract: A method for producing a panel of a multi-layer electronic circuit package and resulting article of manufacture is provided comprising the steps of coating a circuitized core material that has been cut into panels with a dielectric material and copper cover sheets; forming circuits from the cover sheets by etching; applying an adhesive polymer across the dielectric material covering the entire area of the panel; applying a cover sheet; drilling the panel to form through-holes and vias; seeding and plating the through-holes and vias with joining metal; applying photo-resist to the panels exposed with an image of the area of the panel to be joined and developed; and etching the cover sheet and the photo-resist away in the area of the panel to be joined to expose the adhesive polymer.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: January 20, 1998
    Assignee: International Business Machines Corporation
    Inventors: Charles Robert Davis, Thomas P. Gall
  • Patent number: 5679444
    Abstract: A method for producing a panel of a multi-layer electronic circuit package and resulting article of manufacture is provided comprising the steps of coating a circuitized core material that has been cut into panels with a dielectric material and copper cover sheets; forming circuits from the cover sheets by etching; applying an adhesive polymer across the dielectric material covering the entire area of the panel; applying a cover sheet; drilling the panel to form through-holes and vias; seeding and plating the through-holes and vias with joining metal; applying photo-resist to the panels exposed with an image of the area of the panel to be joined and developed; and etching the cover sheet and the photo-resist away in the area of the panel to be joined to expose the adhesive polymer.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: October 21, 1997
    Assignee: International Business Machines Corporation
    Inventors: Charles Robert Davis, Thomas P. Gall
  • Patent number: 5442144
    Abstract: A method of making a multilayered circuit board wherein at least two layered subassemblies, each comprising a dielectric layer and at least one conductive layer therein, are bonded together. Each subassembly includes a through-hole extending therethrough which is aligned with a respective through-hole of the other prior to bonding. The subassemblies are compressed at a predetermined pressure (e.g., 300 psi) and then heated to a first temperature (e.g., 300.degree. C.) for an established time period, resulting in formation of a bond between the two through-holes. The resulting alloy formed from this bond possesses a melting point significantly greater than that of the subassembly dielectric (e.g., PTFE). Following this time period, the compressed subassemblies are heated to an even greater temperature (e.g., 380.degree. C.), again for an established time period, to assure dielectric flow. The subassembly is then cooled and the pressure removed.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: August 15, 1995
    Assignee: International Business Machines Corporation
    Inventors: William T. Chen, Thomas P. Gall, James R. Wilcox, Tien Y. Wu
  • Patent number: 5403420
    Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: April 4, 1995
    Assignee: International Business Machines Corporation
    Inventors: Thomas P. Gall, James R. Loomis, David B. Stone, Cheryl L. Tytran, James Wilcox
  • Patent number: 5391514
    Abstract: A method of flip chip bonding an integrated circuit chip to a chip carrier. A high melting temperature composition, such as a binary Pb/Sn alloy, is deposited on contacts on, for example, the chip, and constituents of a low melting composition, such as Bi and Sn, are codeposited on contacts on, for example, the chip carrier. The chip and chip carrier are then heated. This causes the lower melting temperature composition, for example the Bi and Sn, to melt and form a low melting temperature alloy, such as a Bi/Sn alloy. The low melting alloy dissolves the higher melting composition, as Pb/Sn. This results in the formation of a solder bond of a low melting point third composition, such as a ternary alloy of Bi/Pb/Sn.
    Type: Grant
    Filed: April 19, 1994
    Date of Patent: February 21, 1995
    Assignee: International Business Machines Corporation
    Inventors: Thomas P. Gall, Anthony P. Ingraham
  • Patent number: 5379193
    Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: January 3, 1995
    Assignee: International Business Machines Corporation
    Inventors: Thomas P. Gall, James R. Loomis
  • Patent number: 5374344
    Abstract: Disclosed is a multi-compartment electroplating tank and a process for using the tank to simultaneously plate dissimilar materials onto a substrate.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: December 20, 1994
    Assignee: International Business Machines, Inc.
    Inventors: Thomas P. Gall, James Wilcox
  • Patent number: 5363553
    Abstract: Disclosed is a method of producing vias and through holes through a metal laminate. The laminate is a multi-layer, for example, a trilayer of a relatively hard metal between two layers of a relatively soft metal. The method includes the steps of first etching a clearance hole through the soft metal on one side of the trilayer laminate, followed by partially etching the hard metal layer. Next, drilling the remaining thickness of the hard metal, and drilling through the second layer of soft metal.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: November 15, 1994
    Assignee: International Business Machines, Inc.
    Inventors: Robert D. Edwards, Frank D. Egitto, Thomas P. Gall, Paul S. Gursky, David E. Houser, James S. Kamperman, Warren R. Wrenner
  • Patent number: 5359767
    Abstract: A method of making a multilayered circuit board wherein at least two layered subassemblies, each comprising a dielectric layer and at least one conductive layer therein, are bonded together. Each subassembly includes a through-hole extending therethrough which is aligned with a respective through-hole of the other prior to bonding. The subassemblies are compressed at a predetermined pressure (e.g., 300 psi) and then heated to a first temperature (e.g., 300.degree. C.) for an established time period, resulting in formation of a bond between the two through-holes. The resulting alloy formed from this bond possesses a melting point significantly greater than that of the subassembly dielectric (e.g., PTFE). Following this time period, the compressed subassemblies are heated to an even greater temperature (e.g., 380.degree. C.), again for an established time period, to assure dielectric flow. The subassembly is then cooled and the pressure removed.
    Type: Grant
    Filed: August 26, 1993
    Date of Patent: November 1, 1994
    Assignee: International Business Machines Corporation
    Inventors: William T. Chen, Thomas P. Gall, James R. Wilcox, Tien Y. Wu
  • Patent number: 5347710
    Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: September 20, 1994
    Assignee: International Business Machines Corporation
    Inventors: Thomas P. Gall, Howard L. Heck, John S. Kresge