Abstract: A protected stream manager includes one or more subsystems to receive a content stream in a virtual environment, obfuscate the content stream, and prioritize use of a processor to process the content stream.

Abstract: In one or more embodiments, one or more systems, methods, and/or processes may configure at least one of a stylus and a touch controller to utilize the first mode; may receive first user input associated with the stylus in contact with a surface and associated with a measurement of a force of the stylus with the surface; may determine a first number of pixels to activate based at least on the measurement of the force and the first mode; may configure the at least one of the stylus and the touch controller to utilize the second mode; may receive second user input associated with the stylus in contact with the surface and associated with the measurement of the force of the stylus with the surface; and may determine a second number of pixels to activate based at least on the measurement of the force and the second mode.

Abstract: A display device presents visual information with native and non-native resolutions stored in EDID and provided to a graphics controller. Non-native resolutions are generated in response to an object detected that interferes with the presenting of the visual information, such as an object between a projector and projection surface or an object placed on a capacitive mat display. The non-native resolutions present the visual information to avoid the object and are stored in EDID in association with object characteristics to allow re-use of the non-native resolutions when visual information at the display is blocked by an object with similar characteristics.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A protected stream manager includes one or more subsystems to receive a content stream in a virtual environment, obfuscate the content stream, and prioritize use of a processor to process the content stream.

Abstract: A display device presents visual information with native and non-native resolutions stored in EDID and provided to a graphics controller. Non-native resolutions are generated in response to an object detected that interferes with the presenting of the visual information, such as an object between a projector and projection surface or an object placed on a capacitive mat display. The non-native resolutions present the visual information to avoid the object and are stored in EDID in association with object characteristics to allow re-use of the non-native resolutions when visual information at the display is blocked by an object with similar characteristics.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A secondary graphics processor control system includes a secondary graphics processor. A controller is coupled to the secondary graphics processor. The controller detects the start of an application that is associated with a secondary graphics processor and then determines a power capability of a battery. The controller then either prevents enablement of the secondary graphics processor if the power capability is below a predetermined threshold such that only a primary graphics processor processes graphics for the application, or allows enablement of the secondary graphics processor if the power capability is above the predetermined threshold such that the secondary graphics processor processing graphics for the application. The primary graphics processor may be an integrated graphics processing unit (iGPU) provided by a system processor that is mounted to a board, and the secondary graphics processor may be a discrete graphics processing unit (dGPU) that is coupled to the board.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: Systems and methods for display brightness and color optimization include detecting, by a sensor communicatively coupled to a display, a change in an environmental brightness level. Additionally, in response to the change in the environmental brightness level, modifying a brightness level of the display and modifying a color gamut available to the display.

Abstract: A secondary graphics processor control system includes a secondary graphics processor. A controller is coupled to the secondary graphics processor. The controller detects the start of an application that is associated with a secondary graphics processor and then determines a power capability of a battery. The controller then either prevents enablement of the secondary graphics processor if the power capability is below a predetermined threshold such that only a primary graphics processor processes graphics for the application, or allows enablement of the secondary graphics processor if the power capability is above the predetermined threshold such that the secondary graphics processor processing graphics for the application. The primary graphics processor may be an integrated graphics processing unit (iGPU) provided by a system processor that is mounted to a board, and the secondary graphics processor may be a discrete graphics processing unit (dGPU) that is coupled to the board.

Abstract: An improved system and method for selectively applying LCD Response Time Compensation (LRTC) to areas of an LCD panel containing video motion. Motion vectors contained within macroblocks in a compressed video stream are utilized to qualify whether individual pixels in a video frame are a candidate for LRTC. In various embodiments of the invention, computationally expensive LRTC can be selectively applied, pixel-by-pixel, which can result in portable information system power savings by reducing the number of computational cycles and the amount of graphics controller power overhead.

Abstract: A mode of operation of an information handling system is determined based upon configuration information received at a video/graphics port of the information handling system. In response to determining the mode of operation is a first mode of operation, information is provided from the first video/graphics port that represents only a portion of a video image. In response to determining the mode of operation is a second mode of operation, information is provided from the first video/graphics port that represents all of the video image.

Abstract: A mode of operation of an information handling system is determined based upon configuration information received at a video/graphics port of the information handling system. In response to determining the mode of operation is a first mode of operation, information is provided from the first video/graphics port that represents only a portion of a video image. In response to determining the mode of operation is a second mode of operation, information is provided from the first video/graphics port that represents all of the video image.

Abstract: A computer system has a graphics subsystem employing a rasterizer and a frame buffer, with a digital-to-analog converter for producing drive signals to a video display. A bus interface acts as a gateway between a PCI bus and the graphics subsystem; this interface manages commands and DMAs passing between the host processor and various parts of the graphics subsystem. Within the interface, two command FIFOs are employed, one for storing commands/data sent from the host for 2D display (window management) and another for 3D applications. Using two command FIFOs eliminates the need for host semaphore, FIFO draining, and the latency associated with these operations. Timers are provided in the interface, associated with the two command FIFOs, to manage and regulate the frequency with which the system automatically switches between 2D and 3D FIFO processing. Host intervention is minimized by use of a context macro store for holding locally the sequences for context save and context restore which are used repeatedly.

Abstract: In a computer graphics display system, a method and processor are disclosed for drawing one of a concave polygon, self-intersecting polygon and polygon with polygonal hole. Pursuant to the method, a mask buffer organized into an M.times.N plurality of addressable constituent pixels is used. The method includes the steps of: masking the pixels of the mask buffer corresponding to the boundary of the polygon and drawing the pixels in the frame buffer of the display system corresponding to the boundary of the polygon; masking the pixels in the mask buffer corresponding to the interior of the polygon while preserving the masked pixels in the mask buffer corresponding to the polygon boundary; and drawing the pixels in the frame buffer corresponding to the interior of the polygon with reference to the masked polygon interior pixels in the mask buffer.

Abstract: In a computer graphics display system, a method and processor are disclosed for drawing a `polygon with edge`-type primitive encountered in certain high level graphics interface programs. Both the method and processor use a mask buffer organized into a plurality of addressable constituent pixels, each pixel preferably being two bits deep. The method includes: masking the pixels in the mask buffer corresponding to the boundary to the polygon; drawing the pixels in the frame buffer of the display system corresponding to the boundary of the polygon; and drawing the pixels in the frame buffer corresponding to the interior of the polygon with reference to the content of the mask buffer. Corresponding processing steps for writing Z values in a depth buffer are also described. In addition, specific algorithms for implementing the method are set forth, along with an embodiment of a display processor implementing the method.

Abstract: Z-buffer control logic that provides access AND comparison at speeds unconstrained by DRAM memory access times. A Z-buffer controller is implemented which accumulates a number of pixels in adjacent locations into an associated cell. A Z-buffer comparator accesses Z-buffer retained values for the cell in parallel, performs parallel comparisons, and passes the results to a serializer. The Z-buffer serializer returns the order of the written pixels and outputs the required values to a display interface for continued processing and display on a graphics display device.

Abstract: A multi-window display station having main frame (host) interactive and local personal computer display data buffers is provided. The outputs of the two data buffers are merged, using a row or swath buffer, according to default or escape codes stored in one of the data buffers and the combined output drives a plasma panel display. Registers for modified data tags and for presence/absence of escape codes speed the panel update process. Means are included to provide alpha-numeric and graphic windows together on the panel screen.