Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.

Abstract: A substrate patterning method including the steps of spraying ink on a surface of a substrate, the spraying of the ink resulting in an overspray of excess ink past an edge of the substrate; changing a temperature of the excess ink to cause a change in a viscosity of the excess ink; and removing the excess ink having the changed viscosity.

Abstract: A solar cell is formed using a solar cell ablation system. The ablation system includes a single laser source and several laser scanners. The laser scanners include a master laser scanner, with the rest of the laser scanners being slaved to the master laser scanner. A laser beam from the laser source is split into several laser beams, with the laser beams being scanned onto corresponding wafers using the laser scanners in accordance with one or more patterns. The laser beams may be scanned on the wafers using the same or different power levels of the laser source.

Abstract: A solar cell is formed using a solar cell ablation system. The ablation system includes a single laser source and several laser scanners. The laser scanners include a master laser scanner, with the rest of the laser scanners being slaved to the master laser scanner. A laser beam from the laser source is split into several laser beams, with the laser beams being scanned onto corresponding wafers using the laser scanners in accordance with one or more patterns. The laser beams may be scanned on the wafers using the same or different power levels of the laser source.

Abstract: A plating apparatus and method for plating a surface of a substrate are described. Generally, the apparatus includes a double wall plating vessel having an inner cup and an outer cup peripherally surrounding and spaced apart from the inner cup. The inner cup has an inlet for receiving a plating solution and an outlet from which the plating solution overflows into a plenum defined between the inner and outer cups.

Abstract: A plating apparatus and method for plating a surface of a substrate are described. Generally, the apparatus includes a double wall plating vessel having an inner cup and an outer cup peripherally surrounding and spaced apart from the inner cup. The inner cup has an inlet for receiving a plating solution and an outlet from which the plating solution overflows into a plenum defined between the inner and outer cups.

Abstract: Methods of fabricating solar cells are described. A porous layer may be formed on a surface of a substrate, the porous layer including a plurality of particles and a plurality of voids. A solution may be dispensed into one or more regions of the porous layer to provide a patterned composite layer. The substrate may then be heated.

Abstract: Embodiments of apparatuses and methods for removal of ink buildup are generally described herein. Other embodiments may be described and claimed. In an embodiment, a chuck assembly to support a semiconductor substrate is provided. The chuck assembly includes a chuck, a trough disposed below the chuck, and a heater proximate to the trough. The chuck supports the semiconductor substrate while the trough collects an overspray of excess ink sprayed past an edge of the semiconductor substrate. The heater heats the trough.

Abstract: A solar cell is formed using a solar cell ablation system. The ablation system includes a single laser source and several laser scanners. The laser scanners include a master laser scanner, with the rest of the laser scanners being slaved to the master laser scanner. A laser beam from the laser source is split into several laser beams, with the laser beams being scanned onto corresponding wafers using the laser scanners in accordance with one or more patterns. The laser beams may be scanned on the wafers using the same or different power levels of the laser source.

Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.

Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.

Abstract: A plating apparatus and method for plating a surface of a substrate are described. Generally, the apparatus includes a double wall plating vessel having an inner cup and an outer cup peripherally surrounding and spaced apart from the inner cup. The inner cup has an inlet for receiving a plating solution and an outlet from which the plating solution overflows into a plenum defined between the inner and outer cups.

Abstract: Systems and methods combining a cluster chamber with linear sources are described. A plurality of wafers is mounted on a pallet. A central robot in a cluster chamber moves the pallet among chambers connected to the cluster chamber chamber. At least one of the chambers connected to the cluster chamber includes a linear deposition source, the pallet moveable relative to the linear deposition source.

Abstract: A system for substrate deposition. The system includes a wafer pallet and an anode. The wafer pallet has a bottom and a top. The top of the wafer pallet is configured to hold a substrate wafer. The anode has a substantially fixed position relative to the wafer pallet and is configured to move with the wafer pallet through the deposition chamber. The anode is electrically isolated from the substrate wafer.

Abstract: In a solar cell having p doped regions and n doped regions alternately formed in a surface of a semiconductor wafer in offset levels through use of masking and etching techniques, metal contacts are made to the p regions and n regions by first forming a base layer contacting the p doped regions and n doped regions which functions as an antireflection layer, and then forming a barrier layer, such as titanium tungsten or chromium, and a conductive layer such as copper over the barrier layer. Preferably the conductive layer is a plating layer and the thickness thereof can be increased by plating.

Abstract: In a solar cell having p doped regions and n doped regions alternately formed in a surface of a semiconductor wafer in offset levels through use of masking and etching techniques, metal contacts are made to the p regions and n regions by first forming a base layer contacting the p doped regions and n doped regions which functions as an antireflection layer, and then forming a barrier layer, such as titanium tungsten or chromium, and a conductive layer such as copper over the barrier layer. Preferably the conductive layer is a plating layer and the thickness thereof can be increased by plating.

Abstract: In one embodiment, an in-line furnace includes a continuous conveyor configured to hold wafers at an angle relative to ground. The conveyor may have fixedly integrated wafer retainers configured to hold the wafers in slots. The conveyor may be formed by several segments that are joined together. Each of the segments may include a base and a set of wafer retainers formed thereon. The conveyor may be driven to move the wafers through a chamber of the furnace, where the wafers are thermally processed.

Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer in offset levels through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.

Abstract: A carrier for use in processing of a plurality of wafers or other substrates includes a support frame on which the wafers are mounted and in one embodiment at least one auxiliary frame for holding the substrates on the support frame. A plurality of clips extend from the auxiliary frame and engage the substrates in pressure engagement, and fasteners retain the auxiliary frame in position with respect to the support frame. In one embodiment two auxiliary frames can be employed for holding wafers on opposing surfaces of the support frame. The support frame has electrically non-conducting surfaces whereby the processing does not affect the support frame, and the auxiliary frame is made of electrically non-conductive material. The clips are electrically conductive and bridge current from the support frame to the wafers during plating operations. In another embodiment, auxiliary frame are not used and the wafer retention clips are mounted on the support frame.

Abstract: A carrier for use in processing of a plurality of wafers or other substrates includes a support frame on which the wafers are mounted and in one embodiment at least one auxiliary frame for holding the substrates on the support frame. A plurality of clips extend from the auxiliary frame and engage the substrates in pressure engagement, and fasteners retain the auxiliary frame in position with respect to the support frame. In one embodiment two auxiliary frames can be employed for holding wafers on opposing surfaces of the support frame. The support frame has electrically non-conducting surfaces whereby the processing does not affect the support frame, and the auxiliary frame is made of electrically non- conductive material. The clips are electrically conductive and bridge current from the support frame to the wafers during plating operations. In another embodiment, auxiliary frame are not used and the wafer retention clips are mounted on the support frame.