Abstract: A driver can be configured to provide sensed phase currents as feedback to a controller to indicate the output currents from each phase of a switch mode power supply (SMPS). The driver can be configured to temperature compensate the sensed currents in one of two ways. If a temperature sensor is directly coupled to the driver, then the driver may be configured to temperature compensate the sensed currents from each phase based on a temperature measurement made by the temperature sensor. If a temperature sensor is not directly coupled to the driver, then the driver may be configured to temperature compensate the sensed current from each phase based on a temperature signal received from a bus coupled to the driver. The bus can communicate the temperature signal so that multiple drivers can utilize one temperature sensor.

Abstract: A driver can be configured to provide sensed phase currents as feedback to a controller to indicate the output currents from each phase of a switch mode power supply (SMPS). The driver can be configured to temperature compensate the sensed currents in one of two ways. If a temperature sensor is directly coupled to the driver, then the driver may be configured to temperature compensate the sensed currents from each phase based on a temperature measurement made by the temperature sensor. If a temperature sensor is not directly coupled to the driver, then the driver may be configured to temperature compensate the sensed current from each phase based on a temperature signal received from a bus coupled to the driver. The bus can communicate the temperature signal so that multiple drivers can utilize one temperature sensor.

Abstract: A driver can be configured to provide sensed phase currents as feedback to a controller to indicate the output currents from each phase of a switch mode power supply (SMPS). The driver can be configured to temperature compensate the sensed currents in one of two ways. If a temperature sensor is directly coupled to the driver, then the driver may be configured to temperature compensate the sensed currents from each phase based on a temperature measurement made by the temperature sensor. If a temperature sensor is not directly coupled to the driver, then the driver may be configured to temperature compensate the sensed current from each phase based on a temperature signal received from a bus coupled to the driver. The bus can communicate the temperature signal so that multiple drivers can utilize one temperature sensor.

Abstract: A package for a current sense circuit may include a lead-frame having a shunt resistance configured to generate a shunt voltage, which can be used to measure a current through the lead-frame. The shunt resistance associated with the lead-frame may be highly variable with temperature, which can cause errors in the current measurement. Accordingly, a current sense circuit can include an amplifier with an input resistor having a composite temperature coefficient configured to match a lead-frame temperature coefficient so that an output of the amplifier is compensated to remove variations in the shunt resistance of the lead-frame due to temperature.

Abstract: A driver can be configured to provide sensed phase currents as feedback to a controller to indicate the output currents from each phase of a switch mode power supply (SMPS). The driver can be configured to temperature compensate the sensed currents in one of two ways. If a temperature sensor is directly coupled to the driver, then the driver may be configured to temperature compensate the sensed currents from each phase based on a temperature measurement made by the temperature sensor. If a temperature sensor is not directly coupled to the driver, then the driver may be configured to temperature compensate the sensed current from each phase based on a temperature signal received from a bus coupled to the driver. The bus can communicate the temperature signal so that multiple drivers can utilize one temperature sensor.

Abstract: A method for operating an account includes several steps. The account is provided for holding assets of a customer, the account having a variable value controlled by the customer. At least a portion of the assets are held in the account for a time period that includes a plurality of cycles. At least a portion of the assets are invested during the time period, and earnings on the investment are transmitted to the customer. A plurality of average cycle values of the account are calculated, with each average cycle value calculated over one of the plurality of cycles. A minimum average cycle value is selected from the plurality of average cycle values, and a bonus is calculated based on the minimum average cycle value. The bonus is transmitted to the customer, and the customer chooses whether to repeat the process.

Abstract: A method for operating an account includes several steps. The account is provided for holding assets of a customer, the account having a variable value controlled by the customer. At least a portion of the assets are held in the account for a time period that includes a plurality of cycles. At least a portion of the assets are invested during the time period, and earnings on the investment are transmitted to the customer. A plurality of average cycle values of the account are calculated, with each average cycle value calculated over one of the plurality of cycles. A minimum average cycle value is selected from the plurality of average cycle values, and a bonus is calculated based on the minimum average cycle value. The bonus is transmitted to the customer, and the customer chooses whether to repeat the process.

Abstract: A chip carrier for wire bond-type chips is disclosed. This chip carrier employs organic dielectric materials, rather than ceramic materials, as is conventional. This chip carrier also employs at least one organic, photoimageable dielectric layer, having plated photo-vias, to electrically interconnect two (or more) layers of fan-out circuitry. This chip carrier further employs a single-tiered cavity to contain a chip, rather than a multi-tiered cavity, as is conventional. Moreover, this chip carrier includes thermal via holes and/or a metallic layer, directly beneath the chip, to enhance heat dissipation.

Abstract: A modular structure for providing electrical interconnections achieves greatly increased wiring density by forming vias and wiring patterns by chemical (e.g. lithographic) processes rather than by mechanical processes such as punching of vias and screening patterns of conductive paste. A basic module is a power core comprising an apertured metallic foil with an insulator applied to surfaces thereof, extending through at least one aperture and exposing the metallic foil in at least one aperture. The foil in the power core provides stiffness to facilitate subsequent handling and electrical shielding between conductive layers as well as a potential power connection. Via connections of increased conductivity and robustness are formed by plating the interior of vias after lamination of a desired combination of power cores and signal cores.

Abstract: A process for making a circuitized substrate is defined wherein the substrate is treated with two different, e.g., additive and subtractive, metallization processes. The process is thus able to effectively produce substrates including conductive features, e. g., high density circuit lines and chip heat-sinking pads, of two different degrees of resolution in a cost effective and expeditious manner. The resulting product is also defined.

Abstract: A chip carrier for wire bond-type chips is disclosed. This chip carrier employs organic dielectric materials, rather than ceramic materials, as is conventional. This chip carrier also employs at least one organic, photoimageable dielectric layer, having plated photo-vias, to electrically interconnect two (or more) layers of fan-out circuitry. This chip carrier further employs a single-tiered cavity to contain a chip, rather than a multi-tiered cavity, as is conventional. Moreover, this chip carrier includes thermal via holes and/or a metallic layer, directly beneath the chip, to enhance heat dissipation.

Abstract: The present invention provides a method of ablative photodecomposition and forming metal pattern which attains high resolution, is convenient, and employs non-halogenated solvents. The present invention is directed to a process for forming a metal pattern, preferably circuitization on an organic substrate, preferably on a circuit board or component thereof, which comprises coating the substrate with an ablatively-removable coating comprising a polymer resin preferably an acrylate polymer resin and preferably an ultraviolet absorber. A pattern is formed in the polymer coating corresponding to the desired metal pattern by irradiating at least a portion of the polymer coating with a sufficient amount of ultraviolet radiation to thereby ablatively remove the irradiated portion of the polymer coating. Next the patterned substrate is coated with a conductive metal paste to define the metal pattern, and the conductive metal paste is cured.

Abstract: A chip carrier for wire bond-type chips is disclosed. This chip carrier employs organic dielectric materials, rather than ceramic materials, as is conventional. This chip carrier also employs at least one organic, photoimageable dielectric layer, having plated photo-vias, to electrically interconnect two (or more) layers of fan-out circuitry. This chip carrier further employs a single-tiered cavity to contain a chip, rather than a multi-tiered cavity, as is conventional. Moreover, this chip carrier includes thermal via holes and/or a metallic layer, directly beneath the chip, to enhance heat dissipation.

Abstract: A process for making a circuitized substrate is defined wherein the substrate is treated with two different, e.g., additive and subtractive, metallization processes. The process is thus able to effectively produce substrates including conductive features, e.g., high density circuit lines and chip heat-sinking pads, of two different degrees of resolution in a cost effective and expeditious manner. The resulting product is also defined.