Patents by Inventor Thomas Pearsall

Thomas Pearsall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050104684
    Abstract: A planar integrated circuit includes a semiconductor substrate having a substrate surface and a trench in the substrate, a waveguide medium in the trench having a top surface and a light propagation axis, the trench having a sufficient depth for the waveguide medium to be at or below said substrate surface, and at least one Schottky barrier electrode formed on the top surface of said waveguide medium and defining a Schottky barrier detector consisting of the electrode and the portion of the waveguide medium underlying the Schottky barrier electrode, at least the underlying portion of the waveguide medium being a semiconductor and defining an electrode-semiconductor interface parallel to the light propagation axis so that light of a predetermined wavelength from said waveguide medium propagates along the interface as a plasmon-polariton wave.
    Type: Application
    Filed: May 26, 2004
    Publication date: May 19, 2005
    Inventors: Gregory Wojcik, Lawrence West, Thomas Pearsall
  • Publication number: 20050053347
    Abstract: An optical circuit including a semiconductor substrate; an optical waveguide formed in or on the substrate; and an optical detector formed in or on the semiconductor substrate, wherein the optical detector is aligned with the optical waveguide so as to receive an optical signal from the optical waveguide during operation, and wherein the optical detector has: a first electrode; a second electrode; and an intermediate layer between the first and second electrodes, the intermediate layer being made of a semiconductor material characterized by a conduction band, a valence band, and deep level energy states introduced between the conduction and valence bands.
    Type: Application
    Filed: May 28, 2004
    Publication date: March 10, 2005
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Lawrence West, Thomas Pearsall, Francisco Leon, Stephen Moffatt
  • Patent number: 6342720
    Abstract: A voltage-controlled, wavelenght-selective photodetector includes comprising a double diode having a counter-polarized Si-Schottky diode and a SiGe PIN diode. The short-wave portion (&lgr;<0.9 &mgr;m) of the light entering the detector through a window generates electron-hole pairs in the Si-Schottky diode, while the longer-wave portion (1 &mgr;m<&lgr;<2 &mgr;m) passes through the substrate and is absorbed in the epitaxially deposited SiGe superlattice or the quantum well diode. The photocurrents of both detectors flow in physically opposite directions and subtract from each other, resulting in a wavelength-dependent operational sign of the photocurrent. The level of the bias voltage applied determines whether the photocurrent of the Si-Schottky diode or the photocurrent of the Si/Ge PIN diode determines the spectrum.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: January 29, 2002
    Assignee: DaimlerChrysler AG
    Inventors: Hartmut Presting, Lorenzo Colace, Gianlorenzo Masini, Thomas Pearsall
  • Patent number: 4382265
    Abstract: A heterojunction semiconductor device comprising an active zone made from a ternary or quaternary alloy of the Ga In As P type and resting via a buffer layer of similar composition on a substrate in such a way that the active layer and the buffer zone have similar expansion coefficients.
    Type: Grant
    Filed: January 24, 1980
    Date of Patent: May 3, 1983
    Assignee: Thomson-CSF
    Inventor: Thomas Pearsall
  • Patent number: 4231049
    Abstract: A photodiode comprising a first layer of a relatively large forbidden band (e.g. 1.4 eV) in a p type of conductivity, wherein photons can be absorbed, thus creating pairs of electron-holes diffusing towards a second layer, said second layer having a forbidden band. (0.7 eV) that is approximately half of the first band. In that second layer of an n-type of conductivity each electron falls and creates by impact ionization a new pair electron-hole, thus producing an avalanche gain of 2. The phenomenon occurs theoretically with a zero bias voltage. In practice the photodiode operates with a bias voltage near zero. The two materials of the heterojunction are for instance In P (forbidden band: 1.4 eV) and Ga.sub.0.47 In .sub.0.53 As (0.7 eV) providing crystalline networks perfectly matched.
    Type: Grant
    Filed: November 7, 1978
    Date of Patent: October 28, 1980
    Assignee: Thomson-CSF
    Inventor: Thomas Pearsall
  • Patent number: 4186407
    Abstract: An avalanche diode comprising a semiconducting heterojunction (Ga.sub.x In.sub.1-x As/InP) intended to oscillate as an "IMPATT" diode. It comprises a substrate of n.sup.+ doped monocrystalline InP supporting a series of three layers which are formed by epitaxy and of which the monocrystalline latices match one another namely an InP layer with n-type doping and two layers of Ga.sub.x In.sub.1-x As (best mode: Ga.sub.0.47 In.sub.0.53 As) with n-type and p.sup.+ -type doping respectively, these two layers being of minimal thickness. When a backward bias is applied to the p.sup.+ n-junction, the avalanche phenomenon takes place in the thin n-type layer of ternary alloy.
    Type: Grant
    Filed: July 31, 1978
    Date of Patent: January 29, 1980
    Assignee: Thomson-CSF
    Inventors: Daniel Delagebeaudeuf, Thomas Pearsall