Patents by Inventor Thomas Pliet

Thomas Pliet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9526183
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: December 20, 2016
    Assignee: Atotech Deutschland GmbH
    Inventors: Bert Reents, Thomas Pliet, Bernd Roelfs, Toshiya Fujiwara, Rene Wenzel, Markus Youkhanis, Soungsoo Kim
  • Publication number: 20160270241
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper.
    Type: Application
    Filed: May 20, 2016
    Publication date: September 15, 2016
    Inventors: Bert REENTS, Thomas PLIET, Bernd ROELFS, Toshiya FUJIWARA, Rene WENZEL, Markus YOUKHANIS, Soungsoo KIM
  • Patent number: 9445510
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper. The process comprises the following steps: (i) formation of a narrow part in the center of a through-hole by electroplating; and (ii) filling the through-hole obtained in step (i) with metal by electroplating.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: September 13, 2016
    Assignee: Atotech Deutschland GmbH
    Inventors: Bert Reents, Thomas Pliet, Bernd Roelfs, Toshiya Fujiwara, Rene Wenzel, Markus Youkhanis, Soungsoo Kim
  • Patent number: 8679316
    Abstract: An aqueous, acid bath for the electrolytic deposition of copper contains at least one copper ion source, at least one acid ion source, at least one brightener compound, and at least one leveler compound, and generates a very uniform copper deposit in particular in blind micro vias (BMVs) and trenches. The leveler compound is selected from among synthetically produced non-functionalized peptides, synthetically produced functionalized peptides, and synthetically produced functionalized amino acids.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: March 25, 2014
    Assignee: Atotech Deutschland GmbH
    Inventors: Heiko Brunner, Bernd Roelfs, Dirk Rohde, Thomas Pliet
  • Patent number: 8507376
    Abstract: Described is a method of forming a solder deposit on a substrate comprising the following steps i) provide a substrate including a surface bearing electrical circuitry that includes at least one contact area, ii) form a solder mask layer that is placed on the substrate surface and patterned to expose the at least one contact area, iii) contact the entire substrate area including the solder mask layer and the at least one contact area with a solution suitable to provide a conductive layer on the substrate surface, iv) electroplate a solder deposit layer containing a tin or tin alloy onto the conductive layer and v) etch away an amount of the solder deposit layer containing tin or tin alloy sufficient to remove the solder deposit layer from the solder mask layer area leaving a solder material layer on the at least one contact area.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: August 13, 2013
    Assignee: Atotech Deutschland GmbH
    Inventors: Ingo Ewert, Sven Lamprecht, Kai-Jens Matejat, Thomas Pliet
  • Publication number: 20110189848
    Abstract: Described is a method of forming a solder deposit on a substrate comprising the following steps i) provide a substrate including a surface bearing electrical circuitry that includes at least one contact area, ii) form a solder mask layer that is placed on the substrate surface and patterned to expose the at least one contact area, iii) contact the entire substrate area including the solder mask layer and the at least one contact area with a solution suitable to provide a conductive layer on the substrate surface, iv) electroplate a solder deposit layer containing a tin or tin alloy onto the conductive layer and v) etch away an amount of the solder deposit layer containing tin or tin alloy sufficient to remove the solder deposit layer from the solder mask layer area leaving a solder material layer on the at least one contact area.
    Type: Application
    Filed: October 7, 2009
    Publication date: August 4, 2011
    Inventors: Ingo Ewert, Sven Lamprecht, Kai-Jens Matejat, Thomas Pliet
  • Publication number: 20110011746
    Abstract: To generate a very uniform copper deposit in particular in blind micro vias (BMVs) and trenches, an aqueous, acid bath for the electrolytic deposition of copper is provided, said bath containing at least one copper ion source, at least one acid ion source, at least one brightener compound and at least one leveler compound, wherein at least one leveler compound is selected from the group comprising synthetically produced non-functionalized peptides and synthetically produced functionalized peptides and synthetically produced functionalized amino acids.
    Type: Application
    Filed: April 27, 2009
    Publication date: January 20, 2011
    Applicant: ATOTECH DEUTSCHLAND GMBH
    Inventors: Heiko Brunner, Bernd Roelfs, Dirk Rohde, Thomas Pliet
  • Publication number: 20090236230
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper.
    Type: Application
    Filed: August 30, 2005
    Publication date: September 24, 2009
    Inventors: Bert Reents, Thomas Pliet, Bernd Roelfs, Toshiya Fujiwara, Rene Wenzel, Markus Youkhanis, Soungsoo Kim