Patents by Inventor Thomas R. Benson
Thomas R. Benson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170342106Abstract: Provided is a method for making the compound of Formula 1. Various compounds utilized in that method are also provided, as are methods of making those compounds. Also provided is a compound having the formula XO—CO—(CH2)nNH2, where n is an integer greater than 2. A method of making that compound is additionally provided. Further provided is a method of making a prodrug of a bioactive compound.Type: ApplicationFiled: November 10, 2015Publication date: November 30, 2017Applicant: Inspyr Therapeutics, Inc.Inventors: John K. Lynch, Jeffrey Hutchison, Thomas R. Benson
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Patent number: 9514326Abstract: The various technologies presented herein relate to analyzing a plurality of shares stored at a plurality of repositories to determine whether a secret from which the shares were formed matches a term in a query. A threshold number of shares are formed with a generating polynomial operating on the secret. A process of serially interpolating the threshold number of shares can be conducted whereby a contribution of a first share is determined, a contribution of a second share is determined while seeded with the contribution of the first share, etc. A value of a final share in the threshold number of shares can be determined and compared with the search term. In the event of the value of the final share and the search term matching, the search term matches the secret in the file from which the shares are formed.Type: GrantFiled: October 14, 2014Date of Patent: December 6, 2016Assignee: Sandia CorporationInventors: Thomas M. Kroeger, Thomas R. Benson
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Patent number: 6845417Abstract: A method and system for ordering equitable access to a limited resource (such as a spinlock) by a plurality of contenders (such as processors) where each of the contenders contends for access more than one time. The method classifies one or more contenders that have failed to gain access to the limited resource after at least a predetermined number of attempts as abused contenders. The abused contenders attempt among themselves to gain access to the limited resource. The method repeats the above until all of the abused contenders have gained access to the limited resource.Type: GrantFiled: January 9, 2002Date of Patent: January 18, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: James R. Kauffman, Thomas R. Benson
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Publication number: 20030131168Abstract: A method and system for ordering equitable access to a limited resource (such as a spinlock) by a plurality of contenders (such as processors) where each of the contenders contends for access more than one time. The method classifies one or more contenders that have failed to gain access to the limited resource after at least a predetermined number of attempts as abused contenders. The abused contenders attempt among themselves to gain access to the limited resource. The method repeats the above until all of the abused contenders have gained access to the limited resource.Type: ApplicationFiled: January 9, 2002Publication date: July 10, 2003Inventors: James R. Kauffman, Thomas R. Benson
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Patent number: 6424542Abstract: A PC card holder is mounted on a circuit board. A card retainer is mounted adjacent to the holder to prevent unintentional movement of a card out of an engaged position in the holder when the holder is subjected to vibrations. The retainer preferably includes a finger having a hook formed on a free end thereof that is yieldably biased into a blocking position in which it blocks the unintentional movement. An outer end surface of the hook engages a front corner portion of the card. When the card is being intentionally removed from the holder, movement of the card deflects the finger to allow passage of the card. Similarly, insertion of a card into the holder deflects the finger into a nonblocking position.Type: GrantFiled: October 29, 1998Date of Patent: July 23, 2002Assignee: Intermec IP Corp.Inventor: Thomas R. Benson
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Patent number: 6259044Abstract: A keypad-overlay for use with an electronic device. The electronic device has a plurality of keys or signal input members coupled to electronic components within a housing of the electronic device. The signal input members have key indicia that identify key strokes usable in operation of the electronic components. The keypad-overlay is removably positioned adjacent to the signal input members. The keypad-overlay has a plurality of translucent cover members each positioned over a respective key indicia within the key indicia being visible to a user through the translucent cover member. The cover members have tactile indicators that provide a tactile indication to a user that the cover member has depressed a selected distance to accomplish a key stroke. The cover members have a key-activating protrusion positioned to engage and activate the key when the cover member is depressed toward the key.Type: GrantFiled: March 3, 2000Date of Patent: July 10, 2001Assignee: Intermec IP CorporationInventors: Robert Paratore, Thomas R. Benson
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Patent number: 5819252Abstract: A method executed in a computer system for detecting and handling an invalid use of a data structure is described. The method includes the steps of providing a data structure associated with a first computing environment. The data structure includes a field having a value stored therein identifying an inaccessible address in a second computing environment. This field is used in detecting an invalid use of the data structure in the second computing environment by a computer program attempting to access memory using said inaccessible address indicated by said value contained in the first field. Additionally a preferred data structure is described as are alternative embodiments of detecting an invalid use of a data structure.Type: GrantFiled: April 10, 1996Date of Patent: October 6, 1998Assignee: Digital Equipment CorporationInventors: Thomas R. Benson, Michael S. Harvey, Karen L. Noel, Mark E. Arsenault, Leonard S. Szubowicz, Gary M. Barton, Ronald F. Brender, Kenneth W. Cowan, Mark W. Davis, Richard E. Peterson, Cheryl D. Stocks
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Patent number: 5598560Abstract: A code translator, constructed similar to a compiler, accepts as an input to be translated the assembly code written for one architecture (e.g., VAX), and produces as an output object code for a different machine architecture (e.g., RISC). The input code is converted into an intermediate language, and a flow graph is constructed. The flow graph is referenced by a flow analyzer for recognizing certain architecture-specific and calling standard-specific coding practices or idioms that cannot be automatically converted, particularly relating to stack usage, register usage, condition codes, and passing arguments for procedure calls. By tracking stack usage within routines, the compiler can distinguish up-level stack and return address references from valid local references. Also, it can inform the user of stack misalignment, which has a severe performance penalty, and can detect code segments where different flow paths may result in different stack depths at runtime, which may indicate a source code error.Type: GrantFiled: March 7, 1991Date of Patent: January 28, 1997Assignee: Digital Equipment CorporationInventor: Thomas R. Benson
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Patent number: 5339238Abstract: A code translator, constructed similar to a compiler, accepts as an input to be translated the assembly code written for one architecture (e.g., VAX), and produces as an output object code for a different machine architecture (e.g., RISC). The input code is converted into an intermediate language, and a flow graph is constructed. The flow graph is referenced by a flow analyzer for recognizing certain architecture-specific and calling standard-specific coding practices or idioms that cannot be automatically converted, particularly relating to stack usage, register usage, condition codes, and passing arguments for procedure calls. By tracking stack usage within routines, the compiler can distinguish up-level stack and return address references from valid local references. Also, it can inform the user of stack misalignment, which has a severe performance penalty, and can detect code segments where different flow paths may result in different stack depths at runtime, which may indicate a source code error.Type: GrantFiled: March 7, 1991Date of Patent: August 16, 1994Inventor: Thomas R. Benson
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Patent number: 5307492Abstract: A code translator, constructed similar to a compiler, accepts as an input to be translated the assembly code written for one architecture (e.g., VAX), and produces as an output object code for a different machine architecture (e.g., RISC). The input code is converted into an intermediate language, and a flow graph is constructed. The flow graph is referenced by a flow analyzer for recognizing certain architecture-specific and calling standard-specific coding practices or idioms that cannot be automatically converted, particularly relating to stack usage, register usage, condition codes, and passing arguments for procedure calls. By tracking stack usage within routines, the compiler can distinguish up-level stack and return address references from valid local references. Also, it can inform the user of stack misalignment, which has a severe performance penalty, and can detect code segments where different flow paths may result in different stack depths at runtime, which may indicate a source code error.Type: GrantFiled: March 7, 1991Date of Patent: April 26, 1994Assignee: Digital Equipment CorporationInventor: Thomas R. Benson
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Patent number: 5301325Abstract: A code translator, constructed similar to a compiler, accepts as an input to be translated the assembly code written for one architecture (e.g., VAX), and produces as an output object code for a different machine architecture (e.g., RISC). The input code is converted into an intermediate language, and a flow graph is constructed. The flow graph is referenced by a flow analyzer for recognizing certain architecture-specific and calling standard-specific coding practices or idioms that cannot be automatically converted, particularly relating to stack usage, register usage, condition codes, and passing arguments for procedure calls. By tracking stack usage within routines, the compiler can distinguish up-level stack and return address references from valid local references. Also, it can inform the user of stack misalignment, which has a severe performance penalty, and can detect code segments where different flow paths may result in different stack depths at runtime, which may indicate a source code error.Type: GrantFiled: March 7, 1991Date of Patent: April 5, 1994Assignee: Digital Equipment CorporationInventor: Thomas R. Benson