Abstract: The invention relates to an integrated circuit structure that includes a substrate wafer having an active device layer disposed on a surface of the substrate wafer and having an electrically conductive element contained therein. The integrated circuit structure further comprises a barrier disposed between the substrate wafer and the active device layer, where the barrier blocks carriers injected into the substrate wafer and reduces low frequency oscillation effect.

Abstract: A method for cleaning phosphorus from a MBE vacuum chamber by freezing the panel (22) placed within the vacuum chamber (10) onto which excess phosphorus is deposited. The panel is connected to a source of cold nitrogen (24) which cools the panel. Water is introduced after the panels are cooled so as to form a layer of ice on top of the phosphorus. The panel may then be removed for cleaning with ice covering the phosphorus without danger of ignition of the phosphorus.

Abstract: A solid state electronic device (40) comprising a substrate (30) and layers (32 and 34) is fabricated to control the formation of crystalline defects to control at least one characteristic of the device, such as current gain beta. The formation of crystalline defects preferably is controlled by controlling the temperature of the substrate, layers or both.

Abstract: A pseudomorphic HEMT having a partially relaxed InGaAs channel layer. In order to increase device performance and lower the electron transport energy levels within the potential well defined by the conduction band of the channel layer, the channel layer thickness is increased beyond a critical thickness that defines where a strained InGaAs channel becomes relaxed and forms crystal lattice dislocations. The channel layer is partially relaxed in that the channel layer thickness exceeds the critical thickness, but the thickness of the channel layer is limited so that dislocations only form in a single direction.