Patents by Inventor Thomas R. Prunty
Thomas R. Prunty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140162416Abstract: A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure.Type: ApplicationFiled: July 1, 2013Publication date: June 12, 2014Inventors: Linda Romano, Andrew P. Edwards, Richard J. Brown, David P. Bour, Hui Nie, Isik C. Kizilyalli, Thomas R. Prunty, Mahdan Raj
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Patent number: 8749015Abstract: A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The method also includes implanting ions into a first region of the second GaN epitaxial layer to electrically isolate a second region of the second GaN epitaxial layer from a third region of the second GaN epitaxial layer. The method further includes forming an active device coupled to the second region of the second GaN epitaxial layer and forming the edge termination structure coupled to the third region of the second GaN epitaxial layer.Type: GrantFiled: November 17, 2011Date of Patent: June 10, 2014Assignee: Avogy, Inc.Inventors: Donald R. Disney, Andrew P. Edwards, Hui Nie, Richard J. Brown, Isik C. Kizilyalli, David P. Bour, Linda Romano, Thomas R. Prunty
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Publication number: 20140145201Abstract: A semiconductor structure includes a III-nitride substrate and a first III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The semiconductor structure also includes a first III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial layer and a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure. The semiconductor structure further includes a second III-nitride epitaxial layer coupled to the first III-nitride epitaxial structure. The second III-nitride epitaxial layer is of a second conductivity type and is not electrically connected to the second III-nitride epitaxial structure.Type: ApplicationFiled: November 29, 2012Publication date: May 29, 2014Applicant: AVOGY, INC.Inventors: Hui Nie, Andrew P. Edwards, David P. Bour, Isik C. Kizilyalli, Richard J. Brown, Thomas R. Prunty
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Publication number: 20140131721Abstract: A gallium nitride (GaN)-based junction field-effect transistor (JFET) can include a GaN drain region having a top surface extending in a lateral dimension, a source region, and a GaN channel region of a first conductivity type coupled between the source region and the GaN drain region and operable to conduct electrical current between the source region and the GaN drain region. The JFET can also include a blocking layer disposed between the source region and the GaN drain region such that the GaN channel region is operable to conduct the electrical current substantially along the lateral dimension in a laterally-conductive region of the GaN channel region, and a GaN gate region of a second conductivity type coupled to the GaN channel region such that the laterally-conductive region of the GaN channel region is disposed between at least a portion of the blocking layer and the GaN gate region.Type: ApplicationFiled: November 13, 2012Publication date: May 15, 2014Applicant: AVOGY, INC.Inventors: Hui Nie, Andrew Edwards, Isik Kizilyalli, Dave Bour, Thomas R. Prunty
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Publication number: 20140116328Abstract: A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer.Type: ApplicationFiled: October 23, 2013Publication date: May 1, 2014Applicant: AVOGY, INC.Inventors: David P. Bour, Thomas R. Prunty, Linda Romano, Richard J. Brown, Isik C. Kizilyalli, Hui Nie
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Publication number: 20140051236Abstract: A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer.Type: ApplicationFiled: October 24, 2013Publication date: February 20, 2014Applicant: AVOGY, INC.Inventors: Madhan Raj, Richard J. Brown, Thomas R. Prunty, David P. Bour, Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano
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Publication number: 20140045306Abstract: A method of regrowing material includes providing a III-nitride structure including a masking layer and patterning the masking layer to form an etch mask. The method also includes removing, using an in-situ etch, a portion of the III-nitride structure to expose a regrowth region and regrowing a III-nitride material in the regrowth region.Type: ApplicationFiled: August 10, 2012Publication date: February 13, 2014Applicant: AVOGY, INC.Inventors: David P. Bour, Thomas R. Prunty, Hui Nie, Madhan M. Raj
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Patent number: 8643134Abstract: A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer.Type: GrantFiled: November 18, 2011Date of Patent: February 4, 2014Assignee: Avogy, Inc.Inventors: Madhan Raj, Richard J. Brown, Thomas R. Prunty, David P. Bour, Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano
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Patent number: 8592298Abstract: A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming a growth mask coupled to the n-type GaN epitaxial layer. The method further includes patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer, and forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer. The at least one p-type GaN epitaxial structure comprises at least one portion of an edge termination structure. The method additionally includes forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate.Type: GrantFiled: December 22, 2011Date of Patent: November 26, 2013Assignee: Avogy, Inc.Inventors: Linda Romano, David P. Bour, Andrew Edwards, Hui Nie, Isik C. Kizilyalli, Richard J. Brown, Thomas R. Prunty
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Patent number: 8592938Abstract: A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer.Type: GrantFiled: November 18, 2011Date of Patent: November 26, 2013Assignee: Avogy, Inc.Inventors: Madhan Raj, Richard J. Brown, Thomas R. Prunty, David P. Bour, Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano
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Patent number: 8569153Abstract: A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer.Type: GrantFiled: November 30, 2011Date of Patent: October 29, 2013Assignee: Avogy, Inc.Inventors: David P. Bour, Thomas R. Prunty, Linda Romano, Richard J. Brown, Isik C. Kizilyalli, Hui Nie
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Patent number: 8502234Abstract: An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction.Type: GrantFiled: November 4, 2011Date of Patent: August 6, 2013Assignee: Agovy, Inc.Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David P. Bour, Richard J. Brown, Thomas R. Prunty
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Publication number: 20130164893Abstract: A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming a growth mask coupled to the n-type GaN epitaxial layer. The method further includes patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer, and forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer. The at least one p-type GaN epitaxial structure comprises at least one portion of an edge termination structure. The method additionally includes forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate.Type: ApplicationFiled: December 22, 2011Publication date: June 27, 2013Applicant: EPOWERSOFT, INC.Inventors: Linda Romano, David P. Bour, Andrew Edwards, Hui Nie, Isik C. Kizilyalli, Richard J. Brown, Thomas R. Prunty
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Publication number: 20130143392Abstract: A method of fabricating a diode in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface and forming a n-type GaN drift layer coupled to the first surface of the n-type GaN substrate. The method also includes forming an in-situ SixNy layer coupled to the n-type GaN drift layer opposite the n-type GaN substrate and at least partially removing portions of the SixNy layer and the n-type GaN drift layer to form a plurality of void regions and a remaining portion of the SixNy layer. The method further includes selectively regrowing a p-type epitaxial layer in the void regions.Type: ApplicationFiled: December 6, 2011Publication date: June 6, 2013Applicant: EPOWERSOFT, INC.Inventors: Linda Romano, David P. Bour, Andrew Edwards, Hui Nie, Isik C. Kizilyalli, Richard J. Brown, Thomas R. Prunty
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Publication number: 20130137225Abstract: A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer.Type: ApplicationFiled: November 30, 2011Publication date: May 30, 2013Applicant: EPOWERSOFT, INC.Inventors: David P. Bour, Thomas R. Prunty, Linda Romano, Richard J. Brown, Isik C. Kizilyalli, Hui Nie
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Publication number: 20130126886Abstract: A method of fabricating a Schottky diode using gallium nitride (GaN) materials includes providing an n-type GaN substrate having a first surface and a second surface. The second surface opposes the first surface. The method also includes forming an ohmic metal contact electrically coupled to the first surface of the n-type GaN substrate and forming an n-type GaN epitaxial layer coupled to the second surface of the n-type GaN substrate. The method further includes forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer and forming a Schottky contact electrically coupled to the n-type AlGaN surface layer.Type: ApplicationFiled: November 18, 2011Publication date: May 23, 2013Applicant: EPOWERSOFT, INC.Inventors: Richard J. Brown, Thomas R. Prunty, David P. Bour, Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, Madhan Raj
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Publication number: 20130126884Abstract: A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure.Type: ApplicationFiled: November 17, 2011Publication date: May 23, 2013Applicant: EPOWERSOFT, INC.Inventors: Linda Romano, Andrew P. Edwards, Richard J. Brown, David P. Bour, Hui Nie, Isik C. Kizilyalli, Thomas R. Prunty, Mahdan Raj
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Publication number: 20130126885Abstract: A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The method also includes implanting ions into a first region of the second GaN epitaxial layer to electrically isolate a second region of the second GaN epitaxial layer from a third region of the second GaN epitaxial layer. The method further includes forming an active device coupled to the second region of the second GaN epitaxial layer and forming the edge termination structure coupled to the third region of the second GaN epitaxial layer.Type: ApplicationFiled: November 17, 2011Publication date: May 23, 2013Applicant: EPOWERSOFT, INC.Inventors: Donald R. Disney, Andrew P. Edwards, Hui Nie, Richard J. Brown, Isik C. Kizilyalli, David P. Bour, Linda Romano, Thomas R. Prunty
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Publication number: 20130126888Abstract: An edge terminated semiconductor device is described including a GaN substrate; a doped GaN epitaxial layer grown on the GaN substrate including an ion-implanted insulation region, wherein the ion-implanted region has a resistivity that is at least 90% of maximum resistivity and a conductive layer, such as a Schottky metal layer, disposed over the GaN epitaxial layer, wherein the conductive layer overlaps a portion of the ion-implanted region. A Schottky diode is prepared using the Schottky contact structure.Type: ApplicationFiled: November 21, 2011Publication date: May 23, 2013Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David Bour, Richard J. Brown, Thomas R. Prunty
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Publication number: 20130127006Abstract: A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer.Type: ApplicationFiled: November 18, 2011Publication date: May 23, 2013Applicant: EPOWERSOFT, INC.Inventors: Madhan Raj, Richard J. Brown, Thomas R. Prunty, David P. Bour, lsik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano