Abstract: A multi-mode redundancy removal method is provided. In this method, after accessing the design, a full-scale redundancy removal using fault simulation can be started. When a predetermined period for performing the full-scale redundancy removal has reached a first cut-off, then the method can determine a location for temporary outputs of the design, create the temporary outputs, and perform a localized redundancy removal up to the temporary outputs. An optimized design based on the full-scale redundancy removal and the localized redundancy removal can be output.

Abstract: A multi-mode redundancy removal method is provided. In this method, after accessing the design, a full-scale redundancy removal using fault simulation can be started. When a predetermined period for performing the full-scale redundancy removal has reached a first cut-off, then the method can determine a location for temporary outputs of the design, create the temporary outputs, and perform a localized redundancy removal up to the temporary outputs. An optimized design based on the full-scale redundancy removal and the localized redundancy removal can be output.

Abstract: A method and system for an automata-based approach to state reachability of an interacting extended finite state machine. The present invention comprises a computer system having a processor, and a memory coupled to the processor via a bus, the memory containing computer readable instructions which when executed by the processor cause the processor to implement a process in accordance with the present invention. A digital system is modeled as an extended finite state machine. Automata operations are applied to the extended finite state machine to efficiently compute a set of reachable states from an initial state. The design of the system is verified by determining whether the set of reachable states includes an undesirable state.