Abstract: A vertical power semiconductor device includes a silicon carbide (SiC) semiconductor body having a first surface and a second surface opposite to each other along a vertical direction. The SiC semiconductor body includes at least one SiC semiconductor layer on a SiC semiconductor substrate. A pn junction is formed in the at least one SiC semiconductor layer. A first load electrode is arranged over the first surface. The vertical power semiconductor device further includes a plurality of first trenches extending into the SiC semiconductor substrate from the second surface. A second load electrode is arranged over the second surface. The second load electrode is electrically connected to the SiC semiconductor substrate via one or more sidewalls of the plurality of first trenches.

Abstract: A semiconductor device includes a semiconductor substrate having a major surface, a trench extending from the major surface into the substrate and having a base and a side wall extending form the base to the major surface, and a field plate arranged in the trench and having a height f. The field plate is electrically insulated from the substrate by a dielectric structure arranged in the trench. The dielectric structure includes a first portion having a first dielectric constant and a second portion having a second dielectric constant higher than the first dielectric constant. The first portion is arranged in a lower portion of the trench. The second portion is arranged in an upper portion of the trench, a thickness x, and overlaps the height of the field plate by a distance v1, where f*0.1?v1?f*0.8 or f*0.3?v1?f*0.6.

Abstract: A field effect transistor (FET) is proposed. The FET includes a transistor cell area in a silicon carbide (SiC) semiconductor body. An edge termination area surrounds the transistor cell area. A source contact is arranged over a first surface of the SiC semiconductor body. A drain contact is arranged on a second surface of the SiC semiconductor body. The FET further includes a drift region of a first conductivity type between the first surface and the second surface. Along a lateral direction, a net doping concentration in the drift region is larger in the transistor cell area than in the edge termination area.

Abstract: A semiconductor die includes a semiconductor device and an edge termination structure laterally between the semiconductor device and a lateral edge of the die. The edge termination structure includes a first inner shield electrode region with a shield electrode in a trench extending into a semiconductor body, an outer shield electrode region with a shield electrode in a trench extending into the semiconductor body and disposed in a first lateral direction between the first inner shield electrode region and the lateral edge, and a well region formed in the semiconductor body adjacent the trench of the first inner shield electrode region. The shield electrode of the first inner shield electrode region is electrically connected to the well region to tap an electrical potential from the well region. The shield electrode of the outer shield electrode region is electrically connected to the shield electrode of the first inner shield electrode region.

Abstract: A semiconductor component includes: gate structures extending into a silicon carbide body from a first surface and having a width along a first horizontal direction parallel to the first surface that is less than a vertical extent of the gate structures perpendicular to the first surface; contact structures extending into the silicon carbide body from the first surface, the gate and contact structures alternating along the first horizontal direction; shielding regions which, in the silicon carbide body, adjoin a bottom of the contact structures and are spaced apart from the gate structures along the first horizontal direction; and source regions between the first surface and body regions. The body regions form pn junctions with the source regions and include main sections adjoining the gate structures and contact sections adjoining the contact structures. A vertical extent of the contact structures is greater than the vertical extent of the gate structures.

Abstract: A semiconductor diode includes a wide bandgap semiconductor body having opposing first and second surfaces. The wide band gap semiconductor body includes a first pn junction diode having a first p-doped region adjoining the first surface and a first n-doped region adjoining both surfaces. The semiconductor diode further includes a semiconductor element including a second pn junction diode having a second p-doped region and second n-doped region, and a dielectric structure between the wide bandgap semiconductor body and semiconductor element. The dielectric structure electrically insulates the wide bandgap semiconductor body from the semiconductor element. The bandgap energy of the semiconductor element is smaller than that of the wide bandgap semiconductor body. A cathode contact is electrically connected to the first n-doped region at the second surface. The second n-doped region of the second pn junction diode is electrically coupled to the first n-doped region of the first pn junction diode.

Abstract: A method of manufacturing a semiconductor device includes forming a trench that extends from a first surface into a silicon carbide body. A first doped region and an oppositely doped second doped region are formed in the silicon carbide body. A lower layer structure is formed on a lower sidewall portion of the trench. An upper layer stack is formed on an upper sidewall portion and/or on the first surface. The first doped region and the upper layer stack are in direct contact along the upper sidewall portion and/or on the first surface. The second doped region and the lower layer structure are in direct contact along the lower sidewall portion.

Abstract: The application relates to a semiconductor transistor device, having a source region, a body region including a channel region extending in a vertical direction, a drain region, a gate region arranged aside the channel region in a lateral direction, and a body contact region made of an electrically conductive material, wherein the body contact region forms a body contact area, the body contact region being in an electrical contact with the body region via the body contact area, and wherein the body contact area is tilted with respect to the vertical direction and the lateral direction.

Abstract: In an embodiment, a transistor device a semiconductor substrate having a main surface, and a cell field including a plurality of transistor cells of a power transistor. The cell field further includes: a body region of a second conductivity type; a source region of a first conductivity type on or in the body region, the first conductivity type opposing the second conductivity type; a gate trench in the main surface of the semiconductor substrate; a gate dielectric lining the gate trench; a metal gate electrode arranged in the gate trench on the gate dielectric; and an electrically insulating cap arranged on the metal gate electrode. A method of fabricating a gate of the transistor device is also described.