Patents by Inventor Thomas Raymond Thurston
Thomas Raymond Thurston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12169142Abstract: Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates.Type: GrantFiled: October 18, 2023Date of Patent: December 17, 2024Assignee: Quantum-Si IncorporatedInventors: Eric A. G. Webster, Todd Rearick, Thomas Raymond Thurston
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Patent number: 12152936Abstract: Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates.Type: GrantFiled: June 7, 2023Date of Patent: November 26, 2024Assignee: Quantum-Si IncorporatedInventors: Eric A. G. Webster, Todd Rearick, Thomas Raymond Thurston
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Patent number: 12123772Abstract: An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit includes a charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers directly into the at least one charge carrier storage region based upon times at which the charge carriers are produced.Type: GrantFiled: June 14, 2022Date of Patent: October 22, 2024Assignee: Quantum-Si IncorporatedInventors: Thomas Raymond Thurston, Benjamin Cipriany, Joseph D. Clark, Todd Rearick, Keith G. Fife
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Patent number: 12085442Abstract: Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates.Type: GrantFiled: October 21, 2021Date of Patent: September 10, 2024Assignee: Quantum-Si IncorporatedInventors: Eric A. G. Webster, Todd Rearick, Thomas Raymond Thurston
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Publication number: 20240068943Abstract: Instrument control and data acquisition in advanced analytic systems that utilize optical pulses for sample analysis are described. Clocking signals for data acquisition, data processing, communication, and/or other data handling functionalities can be derived from an on-board pulsed optical source, such as a passively mode-locked laser. The derived clocking signals can operate in combination with one or more clocking signals from a stable oscillator, so that instrument operation and data handling can tolerate interruptions in operation of the pulsed optical source.Type: ApplicationFiled: November 2, 2023Publication date: February 29, 2024Applicant: Quantum-Si IncorporatedInventors: Jonathan M. Rothberg, Benjamin Cipriany, Faisal R. Ahmad, Joseph D. Clark, Daniel B. Frier, Michael Ferrigno, Mel Davey, Thomas Raymond Thurston, Brett J. Gyarfas, Todd Rearick, Jeremy Christopher Jordan
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Publication number: 20240044703Abstract: Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates.Type: ApplicationFiled: October 18, 2023Publication date: February 8, 2024Applicant: Quantum-Si IncorporatedInventors: Eric A.G. Webster, Todd Rearick, Thomas Raymond Thurston
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Publication number: 20230349755Abstract: Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates.Type: ApplicationFiled: June 7, 2023Publication date: November 2, 2023Applicant: Quantum-Si IncorporatedInventors: Eric A.G. Webster, Todd Rearick, Thomas Raymond Thurston
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Patent number: 11714001Abstract: Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates.Type: GrantFiled: October 21, 2021Date of Patent: August 1, 2023Assignee: Quantum-Si IncorporatedInventors: Eric A. G. Webster, Todd Rearick, Thomas Raymond Thurston
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Publication number: 20230137697Abstract: An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit includes a charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers directly into the at least one charge carrier storage region based upon times at which the charge carriers are produced.Type: ApplicationFiled: June 14, 2022Publication date: May 4, 2023Applicant: Quantum-Si IncorporatedInventors: Thomas Raymond Thurston, Benjamin Cipriany, Joseph D. Clark, Todd Rearick, Keith G. Fife
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Publication number: 20220186295Abstract: Aspects of the disclosure provide methods of determining molecular barcode content based on binding interactions between a barcode recognition molecule and a molecular barcode. In some aspects, the disclosure relates to methods comprising contacting a molecular barcode with a barcode recognition molecule that binds to one or more sites on the molecular barcode, detecting a series of signal pulses, and determining the barcode content based on a barcode-specific pattern in the series of signal pulses.Type: ApplicationFiled: December 15, 2021Publication date: June 16, 2022Applicant: Quantum-Si IncorporatedInventors: Omer Ad, Robert E. Boer, Evan McCormack, Brianna Leigh Haining, Thomas Raymond Thurston, Brian Reed
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Publication number: 20220187205Abstract: Aspects of the disclosure relate to methods and systems for regenerating a sensor chip surface, including techniques for reuse of a single sensor chip in multiple sampling cycles by regenerating a surface of the sensor chip between successive sampling cycles. A method is provided for reusing an integrated device to process a sample, the sample being divided into a plurality of aliquots, the method comprising: loading a first aliquot of the plurality of aliquots into at least some of a plurality of chambers of the integrated device; sampling analytes of the first aliquot while the analytes are present in the at least some of the plurality of chambers; removing the first aliquot from the at least some of the plurality of chambers of the integrated device; and loading a second aliquot of the plurality of aliquots into the at least some of the plurality of chambers of the integrated device.Type: ApplicationFiled: December 14, 2021Publication date: June 16, 2022Inventors: Guojun Chen, Gerard Schmid, Todd Rearick, Thomas Raymond Thurston, Haidong Huang
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Publication number: 20220098658Abstract: Provided herein are methods and integrated devices for improved sequencing of nucleic acid and peptide biomolecules. The present disclosure relates to improved mechanisms for protecting a luminescent label from photo-induced damage through the use of quenching moieties. Further provided herein are methods for improved immobilization of quenching moieties and other molecules of interest through functionalization with chemical moieties, such as click chemistry handles, capable of participating in cross-linking reactions. Quenching moieties may be immobilized to the surface of a sample well in a sequencing substrate or apparatus in a manner that minimizes or eliminates photobleaching of the labeled molecule. The disclosed methods provide for minimized photodamage, increased sensitivity, accuracy and length of reads during nucleic acid and polypeptide sequencing.Type: ApplicationFiled: September 21, 2021Publication date: March 31, 2022Applicant: Quantum-Si IncorporatedInventors: Guojun Chen, Thomas Raymond Thurston, An Li