Patents by Inventor Thomas Ribarich
Thomas Ribarich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12640730Abstract: A circuit is disclosed. The circuit includes a gallium nitride (GaN) switch having a gate terminal, a drain terminal and a source terminal, a driver circuit having an output terminal coupled to the gate terminal, where the driver circuit is arranged to generate an output voltage at the output terminal such that: the output voltage is at a first voltage when a voltage at the drain terminal is below a predetermined voltage; the output voltage is at a second voltage when 1) the voltage at the drain terminal is above the predetermined voltage and 2) a time period during which the output voltage is at the second voltage is less than a predetermined time. In one aspect, the second voltage is greater than the first voltage.Type: GrantFiled: June 4, 2024Date of Patent: May 26, 2026Assignee: Navitas Semiconductor LimitedInventors: Nabil Akel, Jason Zhang, Victor Sinow, Thomas Ribarich
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Publication number: 20260031807Abstract: Systems and methods for a GaN-based motor drive circuit using synchronous rectification is disclosed. In one aspect, a method of operating a motor drive circuit includes providing a half-bridge circuit including a high-side GaN switch and a low-side GaN switch coupled in series at an output node, providing a motor coupled to the output node, turning on the high-side GaN switch such that a first current flows through the motor, turning off the high-side GaN switch, turning on the low-side GaN switch when a voltage at the output node drops below a predetermined threshold voltage, sensing, using a sense device coupled to the low-side GaN switch, a magnitude of a second current that flows through the low-side GaN switch, and turning off the low-side GaN switch when the magnitude of the second current drops below a predetermined threshold current.Type: ApplicationFiled: October 3, 2025Publication date: January 29, 2026Applicant: Navitas Semiconductor LimitedInventors: Santosh SHARMA, Thomas RIBARICH, Matteo UCCELLI, Victor SINOW
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Patent number: 12438535Abstract: Systems and methods for a GaN-based motor drive circuit using synchronous rectification is disclosed. In one aspect, a method of operating a motor drive circuit includes providing a half-bridge circuit including a high-side GaN switch and a low-side GaN switch coupled in series at an output node, providing a motor coupled to the output node, turning on the high-side GaN switch such that a first current flows through the motor, turning off the high-side GaN switch, turning on the low-side GaN switch when a voltage at the output node drops below a predetermined threshold voltage, sensing, using a sense device coupled to the low-side GaN switch, a magnitude of a second current that flows through the low-side GaN switch, and turning off the low-side GaN switch when the magnitude of the second current drops below a predetermined threshold current.Type: GrantFiled: March 23, 2023Date of Patent: October 7, 2025Assignee: Navitas Semiconductor LimitedInventors: Santosh Sharma, Thomas Ribarich, Matteo Uccelli, Victor Sinow
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Patent number: 12395093Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.Type: GrantFiled: June 21, 2023Date of Patent: August 19, 2025Assignee: Navitas Semiconductor LimitedInventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
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Patent number: 12334421Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.Type: GrantFiled: September 21, 2021Date of Patent: June 17, 2025Assignee: Navitas Semiconductor LimitedInventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
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Publication number: 20240405764Abstract: A circuit is disclosed. The circuit includes a gallium nitride (GaN) switch having a gate terminal, a drain terminal and a source terminal, a driver circuit having an output terminal coupled to the gate terminal, where the driver circuit is arranged to generate an output voltage at the output terminal such that: the output voltage is at a first voltage when a voltage at the drain terminal is below a predetermined voltage; the output voltage is at a second voltage when 1) the voltage at the drain terminal is above the predetermined voltage and 2) a time period during which the output voltage is at the second voltage is less than a predetermined time. In one aspect, the second voltage is greater than the first voltage.Type: ApplicationFiled: June 4, 2024Publication date: December 5, 2024Applicant: Navitas Semiconductor LimitedInventors: Nabil Akel, Jason Zhang, Victor Sinow, Thomas Ribarich
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Publication number: 20230387067Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.Type: ApplicationFiled: June 21, 2023Publication date: November 30, 2023Applicant: Navitas Semiconductor LimitedInventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
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Publication number: 20230308091Abstract: Systems and methods for a GaN-based motor drive circuit using synchronous rectification is disclosed. In one aspect, a method of operating a motor drive circuit includes providing a half-bridge circuit including a high-side GaN switch and a low-side GaN switch coupled in series at an output node, providing a motor coupled to the output node, turning on the high-side GaN switch such that a first current flows through the motor, turning off the high-side GaN switch, turning on the low-side GaN switch when a voltage at the output node drops below a predetermined threshold voltage, sensing, using a sense device coupled to the low-side GaN switch, a magnitude of a second current that flows through the low-side GaN switch, and turning off the low-side GaN switch when the magnitude of the second current drops below a predetermined threshold current.Type: ApplicationFiled: March 23, 2023Publication date: September 28, 2023Applicant: Navitas Semiconductor LimitedInventors: Santosh Sharma, Thomas Ribarich, Matteo Uccelli, Victor Sinow
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Patent number: 11715720Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.Type: GrantFiled: February 5, 2021Date of Patent: August 1, 2023Assignee: Navitas Semiconductor LimitedInventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
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Patent number: 11594970Abstract: A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.Type: GrantFiled: January 13, 2022Date of Patent: February 28, 2023Assignee: Navitas Semiconductor LimitedInventors: Thomas Ribarich, Daniel M. Kinzer, Tao Liu, Marco Giandalia, Victor Sinow
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Publication number: 20220231606Abstract: A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.Type: ApplicationFiled: January 13, 2022Publication date: July 21, 2022Applicant: Navitas Semiconductor LimitedInventors: Thomas Ribarich, Daniel M. Kinzer, Tao Liu, Marco Giandalia, Victor Sinow
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Publication number: 20220102251Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.Type: ApplicationFiled: September 21, 2021Publication date: March 31, 2022Applicant: Navitas Semiconductor LimitedInventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
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Publication number: 20220084978Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.Type: ApplicationFiled: February 5, 2021Publication date: March 17, 2022Inventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
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Patent number: 11251709Abstract: A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.Type: GrantFiled: March 16, 2020Date of Patent: February 15, 2022Assignee: Navitas Semiconductor LimitedInventors: Thomas Ribarich, Daniel Marvin Kinzer, Tao Liu, Marco Giandalia, Victor Sinow
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Patent number: 11145579Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.Type: GrantFiled: February 5, 2021Date of Patent: October 12, 2021Assignee: Navitas Semiconductor LimitedInventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
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Patent number: 10931200Abstract: A current detecting GaN FET is disclosed. The current detecting GaN FET includes a first GaN switch having a first gate, a first drain, a first source, and a first field plate. The current detecting GaN FET also includes a second GaN switch having a second gate, a second drain, a second source, and a second field plate. The current detecting GaN FET also includes a resistor. The first and second gates are electrically connected, the first and second drains are electrically connected, and the resistor is connected between the first and second sources.Type: GrantFiled: May 1, 2020Date of Patent: February 23, 2021Assignee: Navitas Semiconductor LimitedInventors: Thomas Ribarich, Daniel Marvin Kinzer, Tao Liu, Marco Giandalia, Victor Sinow
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Patent number: 10833589Abstract: A half bridge circuit is disclosed. The circuit includes low side and high side power switches selectively conductive according to one or more control signals. The circuit also includes a low side power switch driver, configured to control the conductivity state of the low side power switch, and a high side power switch driver, configured to control the conductivity state of the high side power switch. The circuit also includes a controller configured to generate the one or more control signals, a high side slew detect circuit configured to prevent the high side power switch driver from causing the high side power switch to be conductive while the voltage at the switch node is increasing, and a low side slew detect circuit configured to prevent the low side power switch driver from causing the low side power switch to be conductive while the voltage at the switch node is decreasing.Type: GrantFiled: March 4, 2019Date of Patent: November 10, 2020Assignee: NAVITAS SEMICONDUCTOR LIMITEDInventors: Santosh Sharma, Thomas Ribarich, Victor Sinow, Daniel Marvin Kinzer
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Publication number: 20200328682Abstract: A current detecting GaN FET is disclosed. The current detecting GaN FET includes a first GaN switch having a first gate, a first drain, a first source, and a first field plate. The current detecting GaN FET also includes a second GaN switch having a second gate, a second drain, a second source, and a second field plate. The current detecting GaN FET also includes a resistor. The first and second gates are electrically connected, the first and second drains are electrically connected, and the resistor is connected between the first and second sources.Type: ApplicationFiled: May 1, 2020Publication date: October 15, 2020Applicant: Navitas Semiconductor, Inc.Inventors: Thomas Ribarich, Daniel Marvin Kinzer, Tao Liu, Marco Giandalia, Victor Sinow
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Patent number: 10778219Abstract: A half bridge GaN circuit is disclosed. The half bridge GaN circuit includes a first power node having a first power voltage, where the first power voltage is referenced to a switch voltage at the switch node. The half bridge GaN circuit also includes a VMID power node having a VMID power voltage, where the VMID power voltage is referenced to the first power voltage and is less than the first power voltage by a DC voltage. The half bridge GaN circuit also includes a logic circuit, where a negative power terminal of the logic circuit is connected to the VMID node, and where a positive power terminal of the first logic circuit is connected to the first power node, where the logic circuit is configured to generate a logic output voltage, which controls the conductivity of the high side power switch.Type: GrantFiled: August 28, 2019Date of Patent: September 15, 2020Assignee: Navitas Semiconductor, Inc.Inventors: Santosh Sharma, Marco Giandalia, Daniel Marvin Kinzer, Thomas Ribarich
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Publication number: 20200220463Abstract: A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.Type: ApplicationFiled: March 16, 2020Publication date: July 9, 2020Applicant: Navitas Semiconductor, Inc.Inventors: Thomas Ribarich, Daniel Marvin Kinzer, Tao Liu, Marco Giandalia, Victor Sinow