Patents by Inventor Thomas S. Pantelis

Thomas S. Pantelis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7500143
    Abstract: A system (100) for analyzing a fault includes a fault object factory (110) constructed and arranged to receive fault data and create a fault object (112), and a fault diagnosis engine (101) constructed and arranged to perform root cause analysis of the fault object. The system may further include a fault detector (130) constructed and arranged to detect the fault data in a monitored entity, a fault repository (140) constructed and arranged to store and access the fault object; and a fault handler (150) constructed and arranged to be triggered by the fault diagnosis engine to analyze the fault object.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: March 3, 2009
    Assignee: Computer Associates Think, Inc.
    Inventors: Christopher A. Buia, Thomas S. Pantelis, David K. Taylor, Scott Ball, Nathaniel J. Rockwell
  • Patent number: 7103807
    Abstract: A system or a method is designed to detect and suppress faults on network elements located in various logical groups. The system and method of fault status suppression in a communications network includes receiving fault data from a detector identifying fault status of a network element; mapping logical group of the detector and the network element; and suppressing fault on the network element when the detector and the network element are in different logical groups and there is a fault on a device providing communication between the logical groups.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: September 5, 2006
    Assignee: Computer Associates Think, Inc.
    Inventors: Patrick A. Bosa, Joseph Greenwald, Christopher Buia, Thomas S. Pantelis, Scott Ball
  • Publication number: 20040078683
    Abstract: A system (100) for analyzing a fault includes a fault object factory (110) constructed and arranged to receive fault data and create a fault object (112), and a fault diagnosis engine (101) constructed and arranged to perform root cause analysis of the fault object. The system may further include a fault detector (130) constructed and arranged to detect the fault data in a monitored entity, a fault repository (140) constructed and arranged to store and access the fault object; and a fault handler (150) constructed and arranged to be triggered by the fault diagnosis engine to analyze the fault object.
    Type: Application
    Filed: October 29, 2002
    Publication date: April 22, 2004
    Inventors: Christhoper A. Buia, Thomas S. Pantelis, David K. Taylor, Scott Ball, Nathaniel J. Rockwell
  • Publication number: 20030051195
    Abstract: A system or a method is designed to detect and suppress faults on network elements located in various logical groups. The system and method of fault status suppression in a communications network includes receiving fault data from a detector identifying fault status of a network element; mapping logical group of the detector and the network element; and suppressing fault on the network element when the detector and the network element are in different logical groups and there is a fault on a device providing communication between the logical groups.
    Type: Application
    Filed: November 5, 2002
    Publication date: March 13, 2003
    Inventors: Patrick A. Bosa, Joseph Greenwald, Christopher Buia, Thomas S. Pantelis, Scott Ball