Abstract: The present disclosure relates to a method for manufacturing of specially designed substrates for growth of nanostructures and patterned growth on said nanostructures. The present disclosure further relates to nanostructures, in particular hybrid semiconductor nanostructures with patterned growth of superconducting material for use in quantum devices. The presently disclosed method can be utilized for in-situ manufacturing of quantum devices that have not been contaminated by ex-situ processes.

Abstract: The present disclosure further relates to nanostructures, in particular hybrid nanostructures with patterned growth of various layers for use in nanoscale electronic devices, such as hybrid semiconductor nanostructures with patterned growth and/or deposition of superconducting material for use in quantum devices. The presently disclosed method can be utilized for in-situ manufacturing of nanoscale electronic devices that have not been contaminated by ex-situ processes.

Abstract: The present disclosure relates to a method for manufacturing of specially designed substrates for growth of nanostructures and patterned growth on said nanostructures. The present disclosure further relates to nanostructures, in particular hybrid semiconductor nanostructures with patterned growth of superconducting material for use in quantum devices. The presently disclosed method can be utilized for in-situ manufacturing of quantum devices that have not been contaminated by ex-situ processes.

Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

Abstract: Apparatuses, methods, program products, and systems are presented for guided cable management. An apparatus includes a cable module that detects a first end of a cable installed at a port of a first node, a first port module that determines whether the cable that is installed at the port is an expected cable for the port based on a cable mapping table, and a first indicator module that triggers a visual indicator at the port to visually confirm that the cable is the expected cable for the port. The apparatus includes a second port module that determines a port of a second node where a second end of the cable is expected to be installed and a second indicator module that triggers a visual indicator at the port to visually indicate that the second end of the cable is expected to be installed in the port.

Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.

Abstract: Apparatuses, methods, program products, and systems are presented for guided cable management. An apparatus includes a cable module that detects a first end of a cable installed at a port of a first node, a first port module that determines whether the cable that is installed at the port is an expected cable for the port based on a cable mapping table, and a first indicator module that triggers a visual indicator at the port to visually confirm that the cable is the expected cable for the port. The apparatus includes a second port module that determines a port of a second node where a second end of the cable is expected to be installed and a second indicator module that triggers a visual indicator at the port to visually indicate that the second end of the cable is expected to be installed in the port.

Abstract: The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.

Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.

Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.

Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

Abstract: The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.

Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.

Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

Abstract: A method and an apparatus for the protection of a railroad rail, a direct fixation plate or another support unit, a rail to rail connection and a rail to plate connection contacting with concrete upon placing of concrete during construction. The method comprises a step of disposing a mask over a railroad track having a railroad rail, a rail connector and a rail tie to protect the railroad track while placing concrete, the mask configured to cover the rail connector and tie. The mask has a connecting portion, a central portion, an extending portion configured to mask an upper longitudinally extending portion of a railroad rail, and at least one perpendicular section disposed to cover a railroad tie, direct fixation plate or other support unit.

Abstract: This invention relates to tryptophan hydroxylase inhibitors, compositions comprising them, and methods of their use for the treatment, management and/or prevention of metastatic bone disease.

Abstract: A method and system for communication in a system area network (SAN) data processing system are described. The SAN includes a plurality of interconnected nodes that each have at least one port for communication. To avoid communication-induced errors that may arise, for example, if multiple nodes share the same node ID, the port of a node in the SAN is marked as “fenced” to prevent transmission of packets of a first traffic type while permitting transmission of packets of a second traffic type. The marking of the port may be recorded, for example, in a configuration register of the port. While the port is fenced, only packets of other than the first traffic type are routed via the port. In one preferred embodiment, the second traffic type represents SAN configuration traffic, and the first traffic type represents non-configuration traffic.

Abstract: A method and system for communication in a system area network (SAN) data processing system are described. The SAN includes a plurality of interconnected nodes that each have at least one port for communication. To avoid communication-induced errors that may arise, for example, if multiple nodes share the same node ID, the port of a node in the SAN is marked as “fenced” to prevent transmission of packets of a first traffic type while permitting transmission of packets of a second traffic type. The marking of the port may be recorded, for example, in a configuration register of the port. While the port is fenced, only packets of other than the first traffic type are routed via the port. In one preferred embodiment, the second traffic type represents SAN configuration traffic, and the first traffic type represents non-configuration traffic.