Patents by Inventor Thomas Sand Jespersen

Thomas Sand Jespersen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11950516
    Abstract: The present disclosure relates to a method for manufacturing of specially designed substrates for growth of nanostructures and patterned growth on said nanostructures. The present disclosure further relates to nanostructures, in particular hybrid semiconductor nanostructures with patterned growth of superconducting material for use in quantum devices. The presently disclosed method can be utilized for in-situ manufacturing of quantum devices that have not been contaminated by ex-situ processes.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: April 2, 2024
    Assignee: University of Copenhagen
    Inventors: Thomas Sand Jespersen, Jesper Nygård, Damon Carrad, Martin Bjergfelt
  • Publication number: 20220157932
    Abstract: The present disclosure further relates to nanostructures, in particular hybrid nanostructures with patterned growth of various layers for use in nanoscale electronic devices, such as hybrid semiconductor nanostructures with patterned growth and/or deposition of superconducting material for use in quantum devices. The presently disclosed method can be utilized for in-situ manufacturing of nanoscale electronic devices that have not been contaminated by ex-situ processes.
    Type: Application
    Filed: July 8, 2019
    Publication date: May 19, 2022
    Inventors: Thomas Sand Jespersen, Jesper Nygård, Damon Carrad, Martin Bjergfelt
  • Publication number: 20210083167
    Abstract: The present disclosure relates to a method for manufacturing of specially designed substrates for growth of nanostructures and patterned growth on said nanostructures. The present disclosure further relates to nanostructures, in particular hybrid semiconductor nanostructures with patterned growth of superconducting material for use in quantum devices. The presently disclosed method can be utilized for in-situ manufacturing of quantum devices that have not been contaminated by ex-situ processes.
    Type: Application
    Filed: March 25, 2019
    Publication date: March 18, 2021
    Inventors: Thomas Sand Jespersen, Jesper Nygård, Damon Carrad, Martin Bjergfelt
  • Patent number: 10903411
    Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: January 26, 2021
    Inventors: Charles M. Marcus, Peter Krogstrup, Thomas Sand Jespersen, Jesper Nygård, Karl Petersson, Thorvald Larsen, Ferdinand Kuemmeth
  • Patent number: 10720562
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: July 21, 2020
    Assignee: University of Copenhagen
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Patent number: 10669647
    Abstract: The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: June 2, 2020
    Assignee: University of Copenhagen
    Inventors: Peter Krogstrup, Charles Marcus, Thomas Sand Jespersen, Jesper Nygård
  • Publication number: 20190363237
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Application
    Filed: July 10, 2019
    Publication date: November 28, 2019
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Publication number: 20190273196
    Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
    Type: Application
    Filed: January 7, 2019
    Publication date: September 5, 2019
    Inventors: Charles M. Marcus, Peter Krogstrup, Thomas Sand Jespersen, Jesper Nygård, Karl Petersson, Thorvald Larsen, Ferdinand Kuemmeth
  • Patent number: 10367132
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: July 30, 2019
    Assignee: University of Copenhagen
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Patent number: 10177297
    Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: January 8, 2019
    Assignee: University of Copenhagen
    Inventors: Charles M. Marcus, Peter Krogstrup, Thomas Sand Jespersen, Jesper Nygård, Karl Petersson, Thorvald Larsen, Ferdinand Kuemmeth
  • Publication number: 20180195201
    Abstract: The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.
    Type: Application
    Filed: June 27, 2016
    Publication date: July 12, 2018
    Inventors: Peter Krogstrup, Charles Marcus, Thomas Sand Jespersen, Jesper Nygård
  • Publication number: 20170141285
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Application
    Filed: July 2, 2015
    Publication date: May 18, 2017
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Publication number: 20170133576
    Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
    Type: Application
    Filed: March 4, 2015
    Publication date: May 11, 2017
    Inventors: Charles M. Marcus, Peter Krogstrup, Thomas Sand Jespersen, Jesper Nygård, Karl Petersson, Thorvald Larsen, Ferdinand Kuemmeth