Patents by Inventor Thomas Schimert

Thomas Schimert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250185393
    Abstract: A method of fabricating an IR transparent window wafer with integrated AR grating structures includes providing a handle wafer having a first surface and a second surface opposite the first surface, providing a device wafer including a single crystal silicon layer disposed on an oxide layer, the single crystal silicon layer having a planar side and the oxide layer having a bonding side that is opposite the planar side, forming AR grating structures in a first portion of the first surface of the handle wafer, bonding the bonding side of the oxide layer to the first surface of the handle wafer, and etching a recess in the planar side of the single crystal silicon layer to: remove the buried oxide layer, form a plurality of recess walls, and expose the AR grating structures in the first portion of the first surface of the handle wafer.
    Type: Application
    Filed: December 5, 2023
    Publication date: June 5, 2025
    Applicant: DRS Network & Imaging Systems, LLC
    Inventor: Thomas Schimert
  • Publication number: 20240194707
    Abstract: Methods and systems utilizing an enhanced area getter architecture for wafer-level vacuum packaged, uncooled focal plane array (FPA) assembly are disclosed. The FPA assembly includes a device die having a first device surface, an infrared detector array disposed on the first device surface, an infrared reference pixel disposed on the first device surface, and a window die bonded to the device die. The window die includes a recess and comprises a first die surface that overlies the infrared detector array, a second die surface that overlies the infrared reference pixel, and a die wall surface joining the first die surface and the second die surface. The die wall surface forms a perimeter of the recess and a getter material is disposed on at least one of the die wall surface or the first die surface.
    Type: Application
    Filed: December 5, 2023
    Publication date: June 13, 2024
    Applicant: DRS Network & Imaging Systems, LLC
    Inventors: Thomas Schimert, Kuni Shimizu
  • Publication number: 20070262407
    Abstract: Methods for making optically blind reference pixels and systems employing the same. The reference pixels may be configured to be identical to, or substantially identical to, the active detector elements of a focal plane array assembly. The reference pixels may be configured to use the same relatively longer thermal isolation legs as the active detector pixels of the focal plane, thus eliminating joule heating differences. An optically blocking structure may be placed in close proximity directly over the reference pixels.
    Type: Application
    Filed: July 23, 2007
    Publication date: November 15, 2007
    Inventors: Thomas Schimert, Athanasios Syllaios, Roland Gooch, William McCardel
  • Publication number: 20060124831
    Abstract: Methods for making optically blind reference pixels and systems employing the same. The reference pixels may be configured to be identical to, or substantially identical to, the active detector elements of a focal plane array assembly. The reference pixels may be configured to use the same relatively longer thermal isolation legs as the active detector pixels of the focal plane, thus eliminating joule heating differences. An optically blocking structure may be placed in close proximity directly over the reference pixels.
    Type: Application
    Filed: May 31, 2005
    Publication date: June 15, 2006
    Inventors: Thomas Schimert, Athanasios Syllaios, Roland Gooch, William McCardel
  • Publication number: 20050054212
    Abstract: A method for manufacturing optically-transparent lids includes etching sub-wavelength structures on a surface of a lid wafer. The structures may be arrayed in a hexagonally closed-packed pattern.
    Type: Application
    Filed: October 19, 2004
    Publication date: March 10, 2005
    Inventors: Athanasios Syllaios, Roland Gooch, Thomas Schimert, Edward Meissner
  • Publication number: 20050042839
    Abstract: A method for manufacturing integrated circuit device lids includes creating a lid cavity on the surface of a lid wafer, forming a sealing surface on the lid wafer that surrounds the lid cavity, and forming a trench on the lid wafer between the lid cavity and the sealing surface. The resulting structure uptakes excess sealing surface material and prevents such material from entering the lid cavity.
    Type: Application
    Filed: October 18, 2004
    Publication date: February 24, 2005
    Inventors: Athanasios Syllaios, Roland Gooch, Thomas Schimert