Patents by Inventor Thomas Sonderman
Thomas Sonderman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7324865Abstract: A method is provided, the method comprising monitoring consumption of a sputter target to determine a deposition rate of a metal layer during metal deposition processing using the sputter target, and modeling a dependence of the deposition rate on at least one of deposition plasma power and deposition time. The method also comprises applying the deposition rate model to modify the metal deposition processing to form the metal layer to have a desired thickness.Type: GrantFiled: May 9, 2001Date of Patent: January 29, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Thomas Sonderman, Scott Bushman, Craig William Christian
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Patent number: 6850322Abstract: A method and apparatus for controlling wafer thickness uniformity in a multi-zone vertical furnace is provided. The multi-zone furnace bakes a plurality of wafers within each zone for a first bake time. A film thickness of at least one wafer baked in each zone of the furnace is measured using a metrology tool. A film thickness optimization unit determines a deposition rate for the at least one wafer within each zone, with the deposition rate being determined as a function of the film thickness of the wafer and the first bake time. The film thickness optimization unit then determines a second bake time to bake a subsequent set of wafers, and the subsequent set of wafers is baked in the furnace for the second bake time.Type: GrantFiled: December 29, 2000Date of Patent: February 1, 2005Assignee: Advanced Micro Devices, Inc.Inventors: William Jarrett Campbell, Scott Bushman, Thomas Sonderman, Elfido Coss, Jr.
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Publication number: 20050009217Abstract: The present invention is generally directed to various methods of controlling properties and characteristics of a gate insulation layer based upon electrical test data, and a system for performing same. In one illustrative embodiment, the method comprises performing at least one electrical test on at least one semiconductor device, determining at least one parameter of at least one process operation to be performed to form at least one gate insulation layer on a subsequently formed semiconductor device based upon electrical data obtained from the electrical test, and performing at least one process operation comprised of the determined parameter to form the gate insulation layer.Type: ApplicationFiled: July 7, 2003Publication date: January 13, 2005Inventors: Thomas Sonderman, Pirainder Lall
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Patent number: 6650957Abstract: A method and an apparatus for controlling a deposition process in a manufacturing process. A process recipe setting step is performed. A process run of semiconductor devices is performed based upon the process recipe. Metrology data relating to the process run of semiconductor dev determination is made whether production results are within a predetermined tolerance level, based upon the metrology data. Process recipe settings are modified in response to a determination that the production results are within a predetermined tolerance level, based upon the metrology data. A processing tool is capable of receiving at least one control input parameter and a metrology data acquisition unit is interfaced with the processing tool and is capable of acquiring metrology data from the processing tool.Type: GrantFiled: January 3, 2000Date of Patent: November 18, 2003Assignee: Advanced Micro Devices, Inc.Inventors: William Jarrett Campbell, Thomas Sonderman, Craig W. Christian
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Patent number: 6546508Abstract: A method and apparatus for providing fault detection in an Advanced Process Control (APC) framework. A first interface receives operational state data of a processing tool related to the manufacture of a processing piece. The state data is sent from the first interface to a fault detection unit. A fault detection unit determines if a fault condition exists with the processing tool based upon the state data. A predetermined action is performed on the processing tool in response to the presence of a fault condition. In accordance with one embodiment, the predetermined action is to shutdown the processing tool so as to prevent further production of faulty wafers.Type: GrantFiled: October 29, 1999Date of Patent: April 8, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Thomas Sonderman, Elfido Coss, Jr., Qingsu Wang
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Patent number: 6524774Abstract: The present invention is directed to a system and method for controlling the formation of a layer of photoresist. In one illustrative embodiment, the method comprises sensing a viscosity of the photoresist material to be applied on a process layer, providing the sensed viscosity to a controller that determines, based upon the sensed viscosity, at least one parameter of a photoresist application process used to apply the photoresist material, and applying the photoresist using an application process that is comprised of said determined parameter. In one illustrative embodiment, the system is comprised of at least one sensor for sensing the viscosity of the photoresist, a controller that receives the sensed viscosity and determines, based upon the sensed viscosity, at least one parameter of the application process used to apply the photoresist, and a tool for applying the photoresist using a process that includes the determined parameter.Type: GrantFiled: August 30, 2000Date of Patent: February 25, 2003Assignee: Advanced Micro Devices, Inc.Inventor: Thomas Sonderman
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Patent number: 6511898Abstract: A processing line includes a deposition tool, a metrology tool and a controller. The deposition tool is adapted to form a polysilicon layer on a wafer in accordance with a recipe. The metrology tool is adapted to measure a grain size of the polysilicon layer. The controller is adapted to modify the recipe for subsequently formed polysilicon layers based on the measured grain size. A method for controlling a deposition process includes forming a polysilicon layer on a wafer in accordance with a recipe; measuring a grain size of the polysilicon layer; and changing the recipe for subsequently formed polysilicon layers based on the measured grain size.Type: GrantFiled: May 24, 2000Date of Patent: January 28, 2003Assignee: Advanced Micro Devices Inc.Inventors: Thomas Sonderman, Jeremy Lansford, Anthony J. Toprac
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Patent number: 6470230Abstract: A method is provided. for manufacturing, the method including processing a workpiece in a processing step, measuring a parameter characteristic of the processing performed on the workpiece in the processing step, and forming an output signal corresponding to the characteristic parameter measured. The method also includes setting a target value for the processing performed in the processing step based on the output signal.Type: GrantFiled: January 4, 2000Date of Patent: October 22, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Anthony J. Toprac, Michael L. Miller, Thomas Sonderman
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Patent number: 6465263Abstract: The present invention provides for a method and an apparatus for implementing corrected species by monitoring state parameters in a manufacturing process. A process run of semiconductor devices is performed. Production data relating to the process run of semiconductor devices is acquired. The acquired production data is stored into a production database. A recipe management analysis is performed. The apparatus of the present invention comprises: a recipe management system; a first machine interface connected to said recipe management system; a processing tool connected to said first machine interface; and a fault detection system connected to said first machine interface.Type: GrantFiled: January 4, 2000Date of Patent: October 15, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Elfido Coss, Jr., Thomas Sonderman, Robert W. Anderson
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Patent number: 6454899Abstract: A method for filling a trench is provided. A wafer having at least a first layer formed thereon is provided. A trench is formed in the first layer. The depth of the trench is measured. A target thickness is determined based on the depth of the trench. A second layer of the target thickness is formed over the trench. A processing line includes a trench etch tool, a first metrology tool, a trench fill tool, and an automatic process controller. The trench etch tool is adapted to form a trench in a first layer on a wafer. The first metrology tool is adapted to measure the depth of the trench. The trench fill tool is adapted to form a second layer over the first layer based on an operating recipe. An automatic process controller is adapted to determine a target thickness based on the depth of the trench and modify the operating recipe of the trench fill tool based on the target thickness.Type: GrantFiled: June 19, 2001Date of Patent: September 24, 2002Assignee: Advanced Micro Devices, Inc.Inventors: William J. Campbell, H. Jim Fulford, Christopher H. Raeder, Craig W. Christian, Thomas Sonderman
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Publication number: 20020085212Abstract: A method and apparatus for controlling wafer thickness uniformity in a multi-zone vertical furnace is provided. The multi-zone furnace bakes a plurality of wafers within each zone for a first bake time. A film thickness of at least one wafer baked in each zone of the furnace is measured using a metrology tool. A film thickness optimization unit determines a deposition rate for the at least one wafer within each zone, with the deposition rate being determined as a function of the film thickness of the wafer and the first bake time. The film thickness optimization unit then determines a second bake time to bake a subsequent set of wafers, and the subsequent set of wafers is baked in the furnace for the second bake time.Type: ApplicationFiled: December 29, 2000Publication date: July 4, 2002Inventors: William Jarrett Campbell, Scott Bushman, Thomas Sonderman, Elfido Coss,
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Patent number: 6387823Abstract: A method for controlling a deposition process, includes providing a wafer in a chamber of a deposition tool, the deposition tool being adapted to operate in accordance with a recipe; providing reactant gases to the chamber, the reactant gases reacting to form a layer on the wafer; allowing exhaust gases to exit the chamber; measuring characteristics of exhaust gases; and changing the recipe based on the characteristics of the exhaust gases. A deposition tool includes a chamber, a gas supply line, a gas exhaust line, a gas analyzer, and a controller. The chamber is adapted to receive a wafer. The gas supply line is coupled to the chamber for providing reactive gases. The gas exhaust line is coupled to the chamber for receiving exhaust gases. The gas analyzer is coupled to the gas exhaust line and adapted to determine characteristics of the exhaust gases. The controller is adapted to control the processing of the wafer in the chamber based on the characteristics of the exhaust gases.Type: GrantFiled: May 23, 2000Date of Patent: May 14, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Thomas Sonderman, Anthony J. Toprac
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Patent number: 6284622Abstract: A method for filling a trench is provided. A wafer having at least a first layer formed thereon is provided. A trench is formed in the first layer. The depth of the trench is measured. A target thickness is determined based on the depth of the trench. A second layer of the target thickness is formed over the trench. A processing line includes a trench etch tool, a first metrology tool, a trench fill tool, and an automatic process controller. The trench etch tool is adapted to form a trench in a first layer on a wafer. The first metrology tool is adapted to measure the depth of the trench. The trench fill tool is adapted to form a second layer over the first layer based on an operating recipe. An automatic process controller is adapted to determine a target thickness based on the depth of the trench and modify the operating recipe of the trench fill tool based on the target thickness.Type: GrantFiled: October 25, 1999Date of Patent: September 4, 2001Assignee: Advanced Micro Devices, Inc.Inventors: William J. Campbell, H. Jim Fulford, Christopher H. Raeder, Craig W. Christian, Thomas Sonderman
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Patent number: 6258681Abstract: The present invention is directed to a control method for maintaining the drive current of a transistor within acceptable limits. The method comprises determining a size variation of a component of a transistor, e.g., the width of a gate conductor, the width of sidewall spacers or the thickness of the gate dielectric, determining the parameters of an anneal process based upon the determined size variation of the component and performing the anneal process using the determined parameters.Type: GrantFiled: October 25, 1999Date of Patent: July 10, 2001Assignee: Advanced Micro Devices, Inc.Inventors: H. Jim Fulford, Thomas Sonderman