Abstract: A capacitance structure includes a first input terminal configured to input a first input signal, a first output terminal configured to output the first output signal, a second input terminal configured to input a second input signal, a second output terminal configured to output a second output signal, and a plurality of trench cells. Each of the plurality of trench cells includes a first electrode and a second electrode. The first electrodes of the plurality of trenches are interconnected to form a first electrode of the capacitor structure, the second electrodes of the plurality of trench cells are interconnected to form a second electrode of the capacitor structure, the first electrode of the capacitor structure is connected to the first input signal, and the second electrode of the capacitor structure is connected to the input second signal.

Abstract: A method is disclosed for use in design of a system, the system to include a plurality of sources contributing to a variable system effect. The method includes determining a plurality of functional units to form the system, obtaining a plurality of constant functional unit source informations, determining at least one variable quantity, associating each functional unit with one of the at least one variable quantity, obtaining variable functional unit source information by combining the constant functional unit source information with the variable quantity associated with the functional unit, and deriving the variable system effect based on combining the variable functional unit source informations. Further a device for use in design of a system is disclosed and also a tangible computer-readable medium storing instruction code thereon, that when executed causes one or more processors to perform steps for design of a system.

Abstract: A method is disclosed for use in design of a system, the system to include a plurality of sources contributing to a variable system effect. The method includes determining a plurality of functional units to form the system, obtaining a plurality of constant functional unit source informations, determining at least one variable quantity, associating each functional unit with one of the at least one variable quantity, obtaining variable functional unit source information by combining the constant functional unit source information with the variable quantity associated with the functional unit, and deriving the variable system effect based on combining the variable functional unit source informations. Further a device for use in design of a system is disclosed and also a tangible computer-readable medium storing instruction code thereon, that when executed causes one or more processors to perform steps for design of a system.

Abstract: Embodiments relate to systems and methods for reducing jitter caused by frequency modulation of a clock signal including modulating the frequency of the clock signal based on a predetermined modulation signal m(t), and compensating an accumulated jitter J(t) caused by the frequency modulation of the clock signal such that an absolute value of the accumulated jitter J(t) never exceeds a predetermined jitter limit Jlim.

Abstract: A capacitance structure includes a first input terminal configured to input a first input signal, a first output terminal configured to output the first output signal, a second input terminal configured to input a second input signal, a second output terminal configured to output a second output signal, and a plurality of trench cells. Each of the plurality of trench cells includes a first electrode and a second electrode. The first electrodes of the plurality of trenches are interconnected to form a first electrode of the capacitor structure, the second electrodes of the plurality of trench cells are interconnected to form a second electrode of the capacitor structure, the first electrode of the capacitor structure is connected to the first input signal, and the second electrode of the capacitor structure is connected to the input second signal.

Abstract: Embodiments relate to systems and methods for reducing jitter caused by frequency modulation of a clock signal including modulating the frequency of the clock signal based on a predetermined modulation signal m(t), and compensating an accumulated jitter J(t) caused by the frequency modulation of the clock signal such that an absolute value of the accumulated jitter J(t) never exceeds a predetermined jitter limit Jlim.

Abstract: A device (12) supplies energy to a rapid cycling and/or rapidly cycled integrated circuit (13, 52) which includes a circuit load (17) and an internal capacity (15) connected parallel to the circuit load (17). The integrated circuit (13, 52) has a high cycle frequency (f1) especially at least in the MHz range. A supply unit (14) especially designed as a current source is directly connected to the internal capacity (15). The supply unit (14) has an internal resistance, the impedance level of which is so high at the cycle frequency (f1) that a current (ID2) supplying the circuit load (17) originates to a greater degree from the internal capacity (15) than from the supply unit (14). At least one auxiliary load, current sink or load controller is provided as an integral component of the integrated circuit and is connected to the circuit load to smooth load fluctuations.

Abstract: The device (12) is used to supply energy to a rapid cycling and/or rapidly cycled integrated circuit (13) which comprises a circuit load (17) and an internal capacity (15) which is switched in parallel to the circuit load (17). The integrated circuit (13) has a high cycle frequency (f1) which in particular lies at least in the MHz range. A supply unit (14) which is in particular designed as a current source is directly connected to the internal capacity (15). The supply unit (14) has an internal resistance, the impedance level of which is so high with the cycle frequency (f1) that a current (ID2) which supplies the circuit load (17) originates to a greater degree from the internal capacity (15) than from the supply unit (14). At least one auxiliary load (54) which is arranged parallel to the circuit load (17) and which can be connected and disconnected, or a current sink, is provided, wherein the auxiliary load (54) or the current sink is in particular an integral component of the circuit (52) respectively.

Abstract: An apparatus for immediately outputting a response of a synchronous system to an asynchronous event includes an advanced calculation device by means of which the responses of the synchronous system to possible asynchronous events can be calculated in advance. Also, a switching device is included by means of which the output signal from the advanced calculation device or the output signal from the synchronous system can be passed on selectively. It is thus possible to output responses from synchronous systems to asynchronous events immediately after such events occur.

Abstract: The current that will be drawn by a digital circuit is predicted on the basis of its schematic circuit diagram. An equivalent circuit is generated, wherein circuit sections of the digital circuit, the output signal levels of which change or can change at the same time, are replaced by an inverter. This renders it possible to determine the current drawn by a digital circuit in a simple, fast and accurate manner even at its design stage.

Abstract: A clock signal generating device is described, having an oscillator and a PLL connected downstream thereof. The clock signal generating device is distinguished by the fact that a phase shifting device is provided between the oscillator and the PLL. This phase shifting device can temporally shift the edges of the signal output by the oscillator to a variable extent, and feeds the resultant signal to the PLL as an input signal. Such a clock signal generating device makes it possible to realize a spread spectrum oscillator which is constructed in a simple manner and can be made small.

Abstract: The invention relates to an electronic device and a semiconductor wafer and also to a method for producing the device and wafer. The electronic device comprises at least one semiconductor chip obtained from corresponding chip positions of a semiconductor wafer constructed according the invention. In this case, the semiconductor chip has two topmost metallization layers that have area-covering voltage supply structures, insulation layers arranged in between, and passage contacts to module regions of an integrated circuit. The voltage supply structure has a grid of supply interconnects arranged parallel to one another. This grid is rotated with respect to a grid of a subsequent metallization layer.

Abstract: The integrated circuit is implemented on a chip. The circuit has several modules, common power supply pins for the modules, and a capacitive buffer devices that buffer the current supply. The capacitive buffers are assigned to each module.

Abstract: A clock signal generating device is described, having an oscillator and a PLL connected downstream thereof. The clock signal generating device is distinguished by the fact that a phase shifting device is provided between the oscillator and the PLL. This phase shifting device can temporally shift the edges of the signal output by the oscillator to a variable extent, and feeds the resultant signal to the PLL as an input signal. Such a clock signal generating device makes it possible to realize a spread spectrum oscillator which is constructed in a simple manner and can be made small.

Abstract: The current that will be drawn by a digital circuit is predicted on the basis of its schematic circuit diagram. An equivalent circuit is generated, wherein circuit sections of the digital circuit, the output signal levels of which change or can change at the same time, are replaced by an inverter. This renders it possible to determine the current drawn by a digital circuit in a simple, fast and accurate manner even at its design stage.

Abstract: An integrated circuit having capacitive elements for smoothing a supply voltage is described. In this case, at least one additional metal electrode, which is configured as a high frequency-optimized capacitance and is distinguished by an extremely low sheet resistance, is connected in parallel with the MOS capacitances. By connecting the areally highly effective MOS capacitance, which, however, is connected with a somewhat higher impedance, in parallel with areally less effective metal capacitances, which, however, are connected to the supply voltage in a very low-impedance manner, it is possible to obtain broadband buffering and thus decoupling of high-frequency interference signals. Very high-frequency interference components are attenuated on the chip and do not pass into the system surrounding the integrated circuit.

Abstract: The integrated circuit is implemented on a chip. The circuit has several modules, common power supply pins for the modules, and a capacitive buffer devices that buffer the current supply. The capacitive buffers are assigned to each module.

Abstract: An integrated circuit is described which is distinguished by the fact that there is integrated in it an RF filter device which can prevent or restrict the propagation of high-frequency interference signals through lines carrying DC voltages or low-frequency voltages. As a result, interference with the operation of the integrated circuit and/or of other integrated circuits or of other components of the system containing the integrated circuit can be prevented in a very simple yet extremely effective manner.

Abstract: The invention relates to a bus driver having an inverter for driving a preferably clocked signal on a bus line. In the event of a capacitive coupling of the bus line to at least one neighboring bus line, a number of secondary inverters corresponding to the number of capacitively coupled bus lines are connected in parallel with the inverter of the bus driver. A simple logic combination supplies the necessary activating signals for the parallel connection of the secondary inverters. As a result, an additional secondary inverter can be connected in when an opposite edge occurs on a neighboring line for the instant of the edge. The invention consequently enables the driver intensity to be adapted dynamically to the signals of neighboring capacitively coupled bus lines.

Abstract: An integrated circuit having capacitive elements for smoothing a supply voltage is described. In this case, at least one additional metal electrode, which is configured as a high frequency-optimized capacitance and is distinguished by an extremely low sheet resistance, is connected in parallel with the MOS capacitances. By connecting the areally highly effective MOS capacitance, which, however, is connected with a somewhat higher impedance, in parallel with areally less effective metal capacitances, which, however, are connected to the supply voltage in a very low-impedance manner, it is possible to obtain broadband buffering and thus decoupling of high-frequency interference signals. Very high-frequency interference components are attenuated on the chip and do not pass into the system surrounding the integrated circuit.