Patents by Inventor Thomas Toll

Thomas Toll has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12327045
    Abstract: In one embodiment, an apparatus includes a memory and a scheduler. The scheduler is coupled to the memory and a memory controller. The memory stores a plurality of metadata requests. Each of the plurality of metadata requests is associated with one of a plurality of metadata priority levels. The scheduler schedules transmission of a first metadata request of the plurality of metadata requests to the memory controller based at least in part on a first metadata priority level associated with the first metadata request and a first bandwidth portion of a metadata request bandwidth. The first bandwidth portion is associated with the first metadata priority level. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: June 10, 2025
    Assignee: Intel Corporation
    Inventors: Ramya Jayaram Masti, Thomas Toll, Adrian C. Moga, Vincent Von Bokern
  • Patent number: 12271057
    Abstract: The present disclosure is directed to methods of tuning chromatic aberration of the eyes of a subject for the treatment of myopia. Refractive errors of an eye of the subject are assessed in the presence of one or more of red, blue, or green colored light, individually. A hybrid achromatic lens having a refractive portion and a diffractive portion is then designed, with the hybrid lens having a distribution of power varied between the refractive portion and diffractive portion. As such, the hybrid lens produces a state of chromatic aberration for the eyes of the subject capable of reducing or eliminating myopia advancement for the eyes of the subject.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: April 8, 2025
    Assignees: The UAB Research Foundation, Board of Trustees of the University of Albama, for and behalf of the University of Alabama Huntsville
    Inventors: Patrick John Reardon, Timothy Jerner Gawne, Thomas Tolles Norton
  • Publication number: 20250053668
    Abstract: Embodiments of apparatuses, methods, and systems for scalable multi-key memory encryption are disclosed. In an embodiment, an apparatus includes a core, an encryption unit, and key identification hardware. The core is to write data to and read data from memory regions, each to be identified by a corresponding address. The encryption unit to encrypt data to be written and decrypt data to be read. The key identification hardware is to use a portion of the corresponding address to look up a corresponding key identifier in a key information data structure. The corresponding key identifier is one multiple key identifiers. The corresponding key identifier is to identify which one of multiple encryption keys is to be used to encrypt and decrypt the data.
    Type: Application
    Filed: October 28, 2024
    Publication date: February 13, 2025
    Applicant: Intel Corporation
    Inventors: Barry E. Huntley, Hormuzd M. Khosravi, Thomas Toll, Ramya Jayaram Masti, Siddhartha Chhabra, Vincent Von Bokern
  • Patent number: 12189792
    Abstract: Embodiments of apparatuses, methods, and systems for scalable multi-key memory encryption are disclosed. In an embodiment, an apparatus includes a core, an encryption unit, and key identification hardware. The core is to write data to and read data from memory regions, each to be identified by a corresponding address. The encryption unit to encrypt data to be written and decrypt data to be read. The key identification hardware is to use a portion of the corresponding address to look up a corresponding key identifier in a key information data structure. The corresponding key identifier is one multiple key identifiers. The corresponding key identifier is to identify which one of multiple encryption keys is to be used to encrypt and decrypt the data.
    Type: Grant
    Filed: September 26, 2020
    Date of Patent: January 7, 2025
    Assignee: Intel Corporation
    Inventors: Barry E. Huntley, Hormuzd M. Khosravi, Thomas Toll, Ramya Jayaram Masti, Siddhartha Chhabra, Vincent Von Bokern
  • Publication number: 20240320002
    Abstract: An apparatus and method for a more efficient system management mode. For example, one embodiment of a processor comprises: a plurality of cores, at least a first core of the plurality of cores to perform operations to cause the plurality of cores to enter into a system management mode (SMM), the operations comprising: allocating a memory region for a system management RAM (SMRAM); writing an SMRAM state save location to a first register; and generating a page table in the SMRAM, including mapping a virtual address space a physical address space.
    Type: Application
    Filed: September 29, 2023
    Publication date: September 26, 2024
    Inventors: Jay LAWLOR, David SHEFFIELD, Xiang ZOU, Michael KINNEY, Charles HOLTHAUS, Thomas TOLL, Salessawi Ferede YITBAREK, Andreas KLEEN, Keshavan TIRUVALLUR, Sarathy JAYAKUMAR, Ruiyu NI
  • Publication number: 20230085994
    Abstract: Methods and apparatus relating to logical resource partitioning via realm isolation are described. In an embodiment, a logic processor, to be assigned to one of a plurality of processor cores of a processor, executes one or more operations for at least one of a plurality of logical realms; The plurality of logical realms include a security monitor realm and the security monitor realm includes security monitor logic to maintain a Realm Identifier (RID) for each of the plurality of logical realms. The security monitor logic controls access to each of the plurality of realms based at least in part on the RID for each of the plurality of logical realms. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 23, 2023
    Applicant: Intel Corporation
    Inventors: Ramya Jayaram Masti, Thomas Toll, Barry Huntley
  • Publication number: 20220342233
    Abstract: A method of improving emmetropization or slowing myopia development in an eye is provided that involves adjusting the vision in the eye to achieve one or both of increase the distance between the long-wavelength focal plane and the short wavelength focal plane; and position the short wavelength focal plane closer to the cornea than it would normally be located. Multi-spectral devices (e.g., lenses and spectacles) are provided that are useful to improve emmetropization or preventing or reducing the development of myopia, which are optionally multi-focal as well.
    Type: Application
    Filed: August 31, 2020
    Publication date: October 27, 2022
    Applicant: THE UAB RESEARCH FOUNDATION
    Inventors: Timothy Jerner GAWNE, Thomas Tolles NORTON
  • Publication number: 20220206951
    Abstract: A method is described. The method includes executing a memory access instruction for a software process or thread. The method includes creating a memory access request for the memory access instruction having a physical memory address and a first identifier of a realm that the software process or thread execute from. The method includes receiving the memory access request and determining a second identifier of a realm from the physical memory address. The method also includes servicing the memory access request because the first identifier matches the second identifier.
    Type: Application
    Filed: December 24, 2020
    Publication date: June 30, 2022
    Inventors: Thomas TOLL, Ramya JAYARAM MASTI, Barry E. HUNTLEY, Vincent VON BOKERN, Siddhartha CHHABRA, Hormuzd M. KHOSRAVI, Vedvyas SHANBHOGUE, Gideon GERZON
  • Publication number: 20220100871
    Abstract: Embodiments of apparatuses, methods, and systems for scalable multi-key memory encryption are disclosed. In an embodiment, an apparatus includes a core, an encryption unit, and key identification hardware. The core is to write data to and read data from memory regions, each to be identified by a corresponding address. The encryption unit to encrypt data to be written and decrypt data to be read. The key identification hardware is to use a portion of the corresponding address to look up a corresponding key identifier in a key information data structure. The corresponding key identifier is one multiple key identifiers. The corresponding key identifier is to identify which one of multiple encryption keys is to be used to encrypt and decrypt the data.
    Type: Application
    Filed: September 26, 2020
    Publication date: March 31, 2022
    Applicant: Intel Corporation
    Inventors: Barry E. Huntley, Hormuzd M. Khosravi, Thomas Toll, Ramya Jayaram Masti, Siddhartha Chhabra, Vincent Von Bokern
  • Patent number: 10331452
    Abstract: In accordance with embodiments disclosed herein, there is provided systems and methods for tracking the mode of processing devices in an instruction tracing system. The method may include receiving an indication of a change in a current execution mode of the processing device. The method may also include determining that the current execution mode of the received indication is different than a value of an execution mode of a first execution mode (EM) packet previously-generated by the IT module. The method may also include generating, based on the determining that the current execution mode is different, a second EM packet that provides a value of the current execution mode of the processing device to indicate the change in the execution mode for an instruction in a trace generated by the IT module. The method may further include generating transactional memory (TMX) packets having n bit mode pattern in the packet log. The n is at least two and the n bit mode indicates transaction status of the TMX operation.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: June 25, 2019
    Assignee: Intel Corporation
    Inventors: Thilo Schmitt, Peter Lachner, Beeman Strong, Ofer Levy, Thomas Toll, Matthew Merten, Tong Li, Ravi Rajwar, Konrad Lai
  • Publication number: 20150006717
    Abstract: In accordance with embodiments disclosed herein, there is provided systems and methods for tracking the mode of processing devices in an instruction tracing system. The method may include receiving an indication of a change in a current execution mode of the processing device. The method may also include determining that the current execution mode of the received indication is different than a value of an execution mode of a first execution mode (EM) packet previously-generated by the IT module. The method may also include generating, based on the determining that the current execution mode is different, a second EM packet that provides a value of the current execution mode of the processing device to indicate the change in the execution mode for an instruction in a trace generated by the IT module. The method may further include generating transactional memory (TMX) packets having n bit mode pattern in the packet log. The n is at least two and the n bit mode indicates transaction status of the TMX operation.
    Type: Application
    Filed: June 27, 2013
    Publication date: January 1, 2015
    Inventors: Thilo Schmitt, Peter Lachner, Beeman Strong, Ofer Levy, Thomas Toll, Matthew Merten, Tong Li, Ravi Rajwar, Konrad Lai
  • Publication number: 20050172107
    Abstract: Replay instruction morphing. One disclosed apparatus includes an execution unit to execute an instruction. A replay system replays an altered instruction if the execution unit executes the instruction erroneously.
    Type: Application
    Filed: February 28, 2005
    Publication date: August 4, 2005
    Inventors: Douglas Carmean, David Sager, Thomas Toll, Karol Menezes