Abstract: Methods, apparatus, systems, and articles of manufacture to make and/or process a diagnostic test device are disclosed. An example apparatus includes a first portion including an opening; a second portion coupled to the first portion and house a lateral flow assay strip, the second portion including a first clip; and a push button located within the opening of the first portion, the push button moveable from a first position to a second position, the push button including a second clip to engage the first clip of the second portion to maintain the push button in the second position when moved into the second position.

Abstract: Methods, apparatus, systems, and articles of manufacture to make and/or process a diagnostic test device are disclosed. An example apparatus includes a sensor to measure a current between a first electrode and a second electrode of a bioelectrochemical cell coupled to a test zone corresponding to a target analyte on a porous media of a device; a processor to compare the current to a threshold; and when the current is more than the threshold, identify that the target analyte is present in a sample; and an antenna to wirelessly transmit results.

Abstract: A method for assaying a sample for each of multiple analytes is described. The method includes contacting an array of spaced-apart test zones with a liquid sample (e.g., whole blood). The test zones disposed within a channel of a microfluidic device. The channel is defined by at least one flexible wall and a second wall which may or may not be flexible. Each test zone comprising a probe compound specific for a respective target analyte. The microfluidic device is compressed to reduce the thickness of the channel, which is the distance between the inner surfaces of the walls within the channel. The presence of each analyte is determined by optically detecting an interaction at each of multiple test zones for which the distance between the inner surfaces at the corresponding location is reduced. The interaction at each test zone is indicative of the presence in the sample of a target analyte.

Abstract: In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.

Abstract: In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.

Abstract: In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.

Abstract: In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.

Abstract: A method for assaying a sample for each of multiple analytes is described. The method includes contacting an array of spaced-apart test zones with a liquid sample (e.g., whole blood). The test zones are disposed within a channel of a microfluidic device. The channel is defined by at least one flexible wall and a second wall which may or may not be flexible. Each test zone comprising a probe compound specific for a respective target analyte. The microfluidic device is compressed to reduce the thickness of the channel, which is the distance between the inner surfaces of the walls within the channel. The presence of each analyte is determined by optically detecting an interaction at each of multiple test zones for which the distance between the inner surfaces at the corresponding location is reduced. The interaction at each test zone is indicative of the presence in the sample of a target analyte.

Abstract: A method for assaying a sample for each of multiple analytes is described. The method includes contacting an array of spaced-apart test zones with a liquid sample (e.g., whole blood). The test zones disposed within a channel of a microfluidic device. The channel is defined by at least one flexible wall and a second wall which may or may not be flexible. Each test zone comprising a probe compound specific for a respective target analyte. The microfluidic device is compressed to reduce the thickness of the channel, which is the distance between the inner surfaces of the walls within the channel. The presence of each analyte is determined by optically detecting an interaction at each of multiple test zones for which the distance between the inner surfaces at the corresponding location is reduced. The interaction at each test zone is indicative of the presence in the sample of a target analyte.

Abstract: A method for assaying a sample for each of multiple analytes is described. The method includes contacting an array of spaced-apart test zones with a liquid sample (e.g., whole blood). The test zones are disposed within a channel of a microfluidic device. The channel is defined by at least one flexible wall and a second wall which may or may not be flexible. Each test zone comprising a probe compound specific for a respective target analyte. The microfluidic device is compressed to reduce the thickness of the channel, which is the distance between the inner surfaces of the walls within the channel. The presence of each analyte is determined by optically detecting an interaction at each of multiple test zones for which the distance between the inner surfaces at the corresponding location is reduced. The interaction at each test zone is indicative of the presence in the sample of a target analyte.

Abstract: A method for assaying a sample for each of multiple analytes is described. The method includes contacting an array of spaced-apart test zones with a liquid sample (e.g., whole blood). The test zones disposed within a channel of a microfluidic device. The channel is defined by at least one flexible wall and a second wall which may or may not be flexible. Each test zone comprising a probe compound specific for a respective target analyte. The microfluidic device is compressed to reduce the thickness of the channel, which is the distance between the inner surfaces of the walls within the channel. The presence of each analyte is determined by optically detecting an interaction at each of multiple test zones for which the distance between the inner surfaces at the corresponding location is reduced. The interaction at each test zone is indicative of the presence in the sample of a target analyte.

Abstract: A method for assaying a sample for each of multiple analytes is described. The method includes contacting an array of spaced-apart test zones with a liquid sample (e.g., whole blood). The test zones disposed within a channel of a microfluidic device. The channel is defined by at least one flexible wall and a second wall which may or may not be flexible. Each test zone comprising a probe compound specific for a respective target analyte. The microfluidic device is compressed to reduce the thickness of the channel, which is the distance between the inner surfaces of the walls within the channel. The presence of each analyte is determined by optically detecting an interaction at each of multiple test zones for which the distance between the inner surfaces at the corresponding location is reduced. The interaction at each test zone is indicative of the presence in the sample of a target analyte.

Abstract: In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.

Abstract: The invention relates to a BiMOS semiconductor component having a semiconductor substrate wherein, in a first active region, a depletion-type MOS transistor is formed comprising additional source and drain doping regions of the first conductivity type extending in the downward direction past the depletion region into the body doping region while, in a second active region, (101), a bipolar transistor (100) is formed, the base of which comprises a body doping region (112) and the collector of which comprises a deep pan (110), wherein an emitter doping region (114) of the first conductivity type and a base connection doping region (118) of the second conductivity type are formed in the body doping region. The semiconductor element can be produced with a particularly low process expenditure because it uses the same basic structure for the doping regions in the bipolar transistor as are used in the MOS transistor of the same semiconductor component.

Abstract: A method for assaying a sample for each of multiple analysis is described. The method includes contacting an array of spaced-apart test zones with a liquid sample (e.g., whole blood). The test zones are disposed within a channel of a microfluidic device. The channel is defined by at least one flexible wall and a second wall which may or may not be flexible. Each test zone includes a probe compound specific for a respective target analyte. The microfluidic device is compressed to reduce the thickness of the channel, which is the distance between the inner surfaces of the walls within the channel. The presence of each analyte is determined by optically detecting an interaction at each of multiple zones for which the distance between the inner surfaces at the corresponding location is reduced. The interaction at each test zone is indicative of the presence in the sample of a target analyte.

Abstract: A semiconductor device with an integrated circuit on a semiconductor substrate comprises a Hall effect sensor in a first active region and a lateral high voltage MOS transistor in a second active region. The semiconductor device of the present invention is characterized in that the structure of the integrated Hall effect sensor is strongly related with the structure of a high-voltage DMOS transistor. The integrated Hall effect sensor is in some features similar to a per se known high-voltage DMOS transistor having a double RESURF structure. The control contacts of the Hall effect sensor correspond to the source and drain contacts of the high-voltage DMOS transistor. The semiconductor device of the present invention allows a simplification of the process integration.

Abstract: Methods of forming, on a substrate, a first lateral high-voltage MOS transistor and a second lateral high-voltage MOS transistor complementary to said first one are disclosed. According to one embodiment, the method includes (1) providing a substrate of a first conductivity type including a first active region for said first lateral high-voltage MOS transistor and a second active region for said second lateral high-voltage MOS transistor and (2) forming at least one first doped region of the first conductivity type in the first active region and forming in the second active region a drain extension region of the second conductivity type extending from a substrate surface to an interior of the substrate, including a concurrent implantation of dopants through openings of one and the same mask into the first and second active regions.

Abstract: A semiconductor device with an integrated circuit on a semiconductor substrate comprises a Hall effect sensor in a first active region and a lateral high voltage MOS transistor in a second active region. The semiconductor device of the present invention is characterized in that the structure of the integrated Hall effect sensor is strongly related with the structure of a high-voltage DMOS transistor. The integrated Hall effect sensor is in some features similar to a per se known high-voltage DMOS transistor having a double RESURF structure. The control contacts of the Hall effect sensor correspond to the source and drain contacts of the high-voltage DMOS transistor. The semiconductor device of the present invention allows a simplification of the process integration.

Abstract: An edge molding providing an edging for a floor covering such as a carpet, rug, tile and the like floor coverings comprising a stepped-molding which attaches to a subfloor edge through a hook and loop means to provide an edge molding for a floor covering which floor covering is attached to the subfloor through a means of a hook and loop arrangement.

Abstract: The invention relates to a method for the production of a first lateral high-voltage MOS transistor and a second lateral high-voltage MOS transistor complimentary thereto on a substrate, wherein the first and second lateral high-voltage MOS transistors each have a conductivity type opposite a drift region, comprising the steps of providing a substrate of a first conductivity type comprising a first active region for the first lateral high-voltage MOS transistor and a second active region for the second lateral high-voltage MOS transistor, and the producing at least one first doping region of the first conductivity type in the first active region and, on the other hand, in the second active region, a drain extension region of the first conductivity type extending from the substrate surface to the interior of the substrate, which allows a simultaneous implantation of doping material in the first and second active regions through respective mask openings of one and the same mask.