Abstract: Embodiments relate to a system and method for managing energy consumption of one or more processor cores in a multicore processing device. The method includes establishing a temporal interval that includes a plurality of temporal periods and an interval energy target for one or more processor cores. The method also includes determining for each temporal period a period energy target for the processor cores and determining a processor core throttling state for the processor cores. The method further includes adjusting the respective period energy target and the respective processor core throttling state at the beginning of each successive temporal period. The method also includes converging, subject to the adjusting, as each respective temporal period of the plurality of temporal periods is concluded, a total period energy consumption of the processor cores with the interval energy target.

Abstract: A system and method for managing energy consumption of one or more processor cores in a multicore processing device. The method includes translating each activity level of the one or more processor cores to a respective charge value. The method also includes generating, at least partially subject to each translated charge value, one or more charge replenishment requests associated with the one or more processor cores. The method further includes transmitting the one or more charge replenishment requests to a pending queue prior to a delay queue.

Abstract: A system and method for managing energy consumption of one or more processor cores in a multicore processing device. The method includes translating each activity level of the one or more processor cores to a respective charge value. The method also includes generating, at least partially subject to each translated charge value, one or more charge replenishment requests associated with the one or more processor cores. The method further includes transmitting the one or more charge replenishment requests to a pending queue prior to a delay queue.

Abstract: A system and method for managing energy consumption of one or more processor cores in a multicore processing device. The method includes recording an activity level of one or more processor cores within a multicore processing device and translating each activity level of the one or more processor cores to a respective charge value. The method also includes generating, at least partially subject to each translated charge value, one or more charge replenishment requests associated with the one or more processor cores. The method further includes determining the one or more charge replenishment requests exceeds a power delivery capacity to the multicore processing device. The method also includes regulating the processing activity of the one or more processor cores to decrease a power consumption for the one or more processing cores.

Abstract: Providing deterministic frequency and voltage enhancements for a processor is disclosed. In an embodiment, a microcontroller on a processor identifies a plurality of parameters related to a processor, the plurality of parameters including at least a current supplied to the processor; determines, in dependence upon the plurality of parameters, one or more frequency scaling indexes including determining an effective switching capacitance ratio; identifies, in dependence upon the one or more frequency scaling indexes, a predetermined frequency parameter for the processor; and transitions, based on the frequency parameter, the processor to a target clock frequency.

Abstract: A system and method for managing energy consumption of one or more processor cores in a multicore processing device. The method includes recording an activity level of one or more processor cores within a multicore processing device and translating each activity level of the one or more processor cores to a respective charge value. The method also includes generating, at least partially subject to each translated charge value, one or more charge replenishment requests associated with the one or more processor cores. The method further includes determining the one or more charge replenishment requests exceeds a power delivery capacity to the multicore processing device. The method also includes regulating the processing activity of the one or more processor cores to decrease a power consumption for the one or more processing cores.

Abstract: Embodiments relate to a system and method for managing energy consumption of one or more processor cores in a multicore processing device. The method includes establishing a temporal interval that includes a plurality of temporal periods and an interval energy target for one or more processor cores. The method also includes determining for each temporal period a period energy target for the processor cores and determining a processor core throttling state for the processor cores. The method further includes adjusting the respective period energy target and the respective processor core throttling state at the beginning of each successive temporal period. The method also includes converging, subject to the adjusting, as each respective temporal period of the plurality of temporal periods is concluded, a total period energy consumption of the processor cores with the interval energy target.

Abstract: A locking cover apparatus for construction vaults. The cover has a latch portion configured to rotate in a first and second direction when a threaded locking security bolt is rotated in the first and second direction respectively, and where the cover is locked from removal from the vault when the latch portion comes into contact with a first stop mechanism after rotating in the first direction and wherein the cover is unlocked when the latch portion comes into contact with a second stop mechanism after rotating in the second direction.

Abstract: A locking cover for existing subgrade vault openings. The cover is installed with mounting brackets on side walls of construction vaults and secured with locking latch components secured against flange portions of the mounting brackets.

Abstract: A locking cover for existing subgrade vault openings. The cover is installed with mounting brackets on side walls of construction vaults and secured with locking latch components secured against flange portions of the mounting brackets.