Patents by Inventor Thomas Vlasak

Thomas Vlasak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5132768
    Abstract: In a semiconductor component with turn-off facility of the GTO type with direct pressure contact, a balancing of the local pressure distribution in the region of the cathode fingers (7) which results in an improved alternating load resistance and also in an extension of the allowable pressure range is achieved by structural matching of the anode metallization (4) to the gate-cathode structure on the cathode side.
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: July 21, 1992
    Assignee: Asea Brown Boveri Limited
    Inventors: Andre Jaecklin, Ezatoll Ramezani, Thomas Vlasak
  • Patent number: 5081050
    Abstract: In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration.The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.
    Type: Grant
    Filed: November 8, 1990
    Date of Patent: January 14, 1992
    Assignee: BBC Brown Boveri AG
    Inventors: Peter Roggwiller, Jan Voboril, Thomas Vlasak
  • Patent number: 5031016
    Abstract: In a semiconductor component with turn-off facility of the GTO type with direct pressure contact, a balancing of the local pressure distribution in the region of the cathode fingers (7) which results in an improved alternating load resistance and also in an extension of the allowable pressure range is achieved by structural matching of the anode metallization (4) to the gate-cathode structure on the cathode side.
    Type: Grant
    Filed: August 10, 1989
    Date of Patent: July 9, 1991
    Assignee: Asea Brown Boveri Limited
    Inventors: Andre Jaecklin, Ezatoll Ramezani, Thomas Vlasak
  • Patent number: 5003368
    Abstract: In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration.The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.
    Type: Grant
    Filed: August 8, 1988
    Date of Patent: March 26, 1991
    Assignee: BBC Brown Boveri AG
    Inventors: Peter Roggwiller, Jan Voboril, Thomas Vlasak
  • Patent number: 4843449
    Abstract: In a controllable power semiconductor component which consists of a plurality of parallel-connected individual elements disposed adjacently to one another, the control contacts of which are connected to a common gate, different line resistances between gate and control contacts are compensated in order to achieve a uniform loading on all individual elements.In a GTO thyristor, the compensation is preferably achieved by adjusting the gate trough resistance (R.sub.G) in the p-type base (3) between gate contact (5) and n-type emitter (2).
    Type: Grant
    Filed: February 4, 1988
    Date of Patent: June 27, 1989
    Assignee: BBC Brown Boveri AG
    Inventors: Andre Jaecklin, Peter Roggwiller, Rudolf Veitz, Thomas Vlasak
  • Patent number: 4806497
    Abstract: A method for producing large-area power semiconductor components, wherein at least two irradiation processes (neutron irridiation, ion implantation electron, .gamma.or proton irradiation) are used to produce the basic doping, to introduce deep pn junctions and to introduce recombination centers. It is precisely for the critical process steps (p-base, n-type stop layer) that the improved homogeneity of the layers signifies a higher yield and improved limit data for the finished components.
    Type: Grant
    Filed: September 11, 1987
    Date of Patent: February 21, 1989
    Assignee: BBC Brown Boveri AG
    Inventors: Bruno Adam, Andre Jaecklin, Thomas Vlasak
  • Patent number: 4525224
    Abstract: A method for the locally selective doping of a planar substrate, essentially made of silicon, for the production of semiconductors using a diffusion process, in which aluminum as the doping additive is applied by vaporizing in a vacuum at temperatures above 500.degree. C. to the substrate surface areas to be doped and permitted to diffuse into the substrate. A part of the substrate surface is masked in order to prevent the doping of the substrate beneath the mask, by forming a SiO.sub.2 layer on the substrate and abutting a masking plate against the SiO.sub.2 layer.
    Type: Grant
    Filed: May 22, 1984
    Date of Patent: June 25, 1985
    Assignee: BBC Brown, Boveri & Cie
    Inventor: Thomas Vlasak
  • Patent number: 4053921
    Abstract: A semiconductor component, preferably a thyristor, having emitter short-circuits in the cathode space. The emitter short-circuits are preferably arranged in a uniform fashion about the cathode space and, when formed of a material having <111> oriented crystals are arranged in ternary symmetry about the cathode or in multiples of three. In the case of material having <001> oriented crystals the emitter short-circuits are arranged in a quarternary symmetry or in multiples of four.
    Type: Grant
    Filed: October 15, 1975
    Date of Patent: October 11, 1977
    Assignee: BBC Brown Boveri & Company Limited
    Inventors: Andre Jaecklin, Thomas Vlasak
  • Patent number: 4046608
    Abstract: Semiconductor components containing at least one junction and at least one weakly N- or P-conducting zone containing from 10.sup.13 to 2.5 .times. 10.sup.14 doping atoms/cm.sup.3 are prepared by diffusing dopant atoms at elevated temperatures into appropriate zones of a semiconductor crystal from a nickel film containing the dopant deposited on the surface of the crystal and then cooling the in-diffused semiconductor crystal to room temperature at a rate sufficient such that the specific resistance of the weakly doped zone is not changed by the nickel atoms which diffuse into the semiconductor crystal along with the doping atom.
    Type: Grant
    Filed: November 4, 1975
    Date of Patent: September 6, 1977
    Assignee: BBC Brown, Boveri & Company, Limited
    Inventors: Paul van Iseghem, Thomas Vlasak, Wolfgang Zimmermann