Abstract: A broadband RF signal amplifier includes a plurality of transistors attached to a surface of a pedestal, each transistor having an input and an output. An RF input path electrically connected to the transistor inputs includes a passive splitter implemented in a multi-layer printed circuit board and configured to split a RF input signal into a plurality of component input signals. A plurality of corresponding input matching networks including one-quarter wavelength transmission lines implemented in the printed circuit board couple respective component input signals to the transistor inputs at an input impedance, the input matching networks further comprising respective input matching capacitors attached to the pedestal. An RF output path electrically connected to the transistor outputs includes a passive combiner implemented in the printed circuit board and configured to combine component output signals received at the transistor outputs into a RF output signal.

Abstract: A broadband RF signal amplifier includes a plurality of transistors attached to a surface of a pedestal, each transistor having an input and an output. An RF input path electrically connected to the transistor inputs includes a passive splitter implemented in a multi-layer printed circuit board and configured to split a RF input signal into a plurality of component input signals. A plurality of corresponding input matching networks including one-quarter wavelength transmission lines implemented in the printed circuit board couple respective component input signals to the transistor inputs at an input impedance, the input matching networks further comprising respective input matching capacitors attached to the pedestal. An RF output path electrically connected to the transistor outputs includes a passive combiner implemented in the printed circuit board and configured to combine component output signals received at the transistor outputs into a RF output signal.

Abstract: A desired performance characteristic of an electrical circuit employing a strip conductor is achieved by placing a fluid having a selected dielectric property in contact with at least a portion of the strip conductor, such that the dielectric property of the fluid effects one or more transmission characteristics of the conductor. In one embodiment, the circuit performance is measured and the dielectric property of the fluid adjusted, e.g., in an iterative process, until the desired performance characteristic of the circuit is achieved.

Abstract: A desired performance characteristic of an electrical circuit employing a strip conductor is achieved by placing a fluid having a selected dielectric property in contact with at least a portion of the strip conductor, such that the dielectric property of the fluid effects one or more transmission characteristics of the conductor. In one embodiment, the circuit performance is measured and the dielectric property of the fluid adjusted, e.g., in an iterative process, until the desired performance characteristic of the circuit is achieved.

Abstract: A plurality of conductors and an electrical component are disposed on a substrate, wherein the electrical component has a plurality of leads that are connected to the conductors on the substrate by a plurality of bond wires. A damping material is then situated in contact with the plurality of bond wires, the damping material chosen so that the plurality of bond wires can move in relation to the damping material. The damping material may be a viscous liquid kept in contact with the bond wires by a containing lid attached to the substrate. Alternatively, the damping material may be a colloidal mixture involving a liquid or an elastomer.

Abstract: An electrical assembly includes an IC package having a thermally conductive mounting flange in contact with a heat sink. A thermally conductive casing is secured to the heat sink, the casing at least partially enclosing the IC package. A resilient retaining member is disposed between the casing and IC package, the retaining member applying sufficient force on the IC package so as to maintain good thermal contact between the mounting flange and heat sink.

Abstract: A thermally conductive mounting flange of an IC package is placed directly on a heat sink surface between respective sections of single layer PC board attached to the heat sink, such that electrical leads extending from opposing sides of the package are positioned over corresponding conductive areas formed on the surface of the respective adjacent PC board section. The leads are electrically coupled with the conductive areas by respective tie-down screws fastened through dielectric isolating washers. The screws are tightened sufficiently against the isolating washers so as to press the respective package leads into solid electrical contact with the conductive areas. Portions of the respective leads and conductive areas surrounding the tie-down screws are cut-away to prevent electrical contact, in order to avoid shorting the leads and/or conductive areas to the heat sink via the tie-down screws.

Abstract: A plurality of transistor cells (36) formed on a semiconductor substrate (32) are connected to form a radio frequency power transistor device (30), whereby individual conductive paths (38) are formed on one side of the substrate (32) to connect respective common gate terminals (34) of adjacent transistor cells (36) in series. A further conductive path (40) is formed on an opposite side of the substrate connecting respective drain terminals (35) of the transistor cells (36) in parallel. A resistive element (42) is interposed in the conductive path (38) connecting each adjacent pair of gate terminals (34). The conductivity of the respective resistive elements (42) is selected so as to adequately provide a conductive pathway for connecting the respective gate terminal outputs, while being sufficiently resistive such that each gate terminal 34 "sees" an electrical circuit termination.

Abstract: A thermally conductive mounting flange of an IC package is placed directly on a heat sink surface between respective sections of single layer PC board attached to the heat sink, such that electrical leads extending from opposing sides of the package are positioned over corresponding conductive areas formed on the surface of the respective adjacent PC board section. The respective package leads are each connected to the corresponding PC board areas by one or more flexible bond wires. In addition to electrically connecting the package leads to the respective PC board sections, the bond wires collectively secure the package to the heat sink in a manner allowing for relative lateral movement between the respective flange and heat sink surfaces in response to thermal stresses.

Abstract: An RF power transistor package is configured for mounting to a heat sink in a multi-layer pc board, and includes a direct top side electrical ground path from a transistor chip located atop a ceramic substrate to a mounting flange, without passing through the ceramic substrate by way of metal plating an outer surface of the ceramic substrate to electrically connect a top mounted metal lead to the flange. A direct ground path from the transistor chip to the mounting flange is also provided by way of plated via holes through the ceramic substrate. The top side ground path is also configured to connect with the middle ground reference layer of the multi-layer pc board when the mounting flange is secured to the heat sink, so that a unified ground potential is seen by the transistor at both the middle layer and heat sink.

Abstract: A semiconductor die is attached to a transistor package by a plurality of resilient clamping members, which are bonded at one end to a top surface of the semiconductor die and at another end to a stable surface, such as an emitter, collector, or base lead frame, of the transistor package. The shape and composition of the clamping members provides a resilient force that causes a bottom surface of the die to make and maintain substantially uniform and constant contact with the die attach area of the transistor package, e.g., a mounting flange or non-conductive substrate. The clamping members are preferably conductive and can conduct current from respective transistor cell locations on the die to the respective lead frames to which the clamping members are bonded.

Abstract: A top surface of a protective cover of an IC component package is provided with a centered-protrusion, e.g., such as a cylindrical peg, that extends above the cover. A retaining-spring is formed by twisting a resilient (e.g., metal) metal strip into a ribbon-like shape having opposing ends that extend from a curvelinear bottom surface. The bottom surface of the retaining-spring is provided with an opening configured to mate with the centered protrusion on the package cover, such that the opposing ends of the retaining-spring extend away from the package cover at substantially the same, albeit reverse angles. In order to mount the IC package to a heat sink, the bottom surface of the retaining-spring may be compressively mated onto the package cover at the same time the package is inserted between two substantially parallel walls protruding from the heat sink surface, wherein the walls are distanced from each other.