Abstract: A detachable current sensor provides an isolated and convenient device to measure current passing through a cable such as an AC power cable or non-metallic (NM) sheathed cable. Information about the magnitude and or phases of the currents passing through and/or voltages on the conductors is obtained by measuring the magnetic field at multiple circumferential positions around the cable using multiple semiconductor magnetic field sensors. A processing subsystem coupled to the multiple semiconductor magnetic field sensors determines information about the currents flowing in the conductors of the cable, including the current magnitude(s), and/or the phases and number of phases present in the cable, which can form part of a power measurement system that is used for energy monitoring, and/or for control purposes.

Abstract: Calibration of a non-contact voltage sensor provides improved accuracy for measuring voltage on a conductor such as an AC branch circuit wire. In a calibration mode, a predetermined voltage is imposed on a first voltage sensing conductor integrated in the non-contact voltage sensor, while a voltage on a second voltage sensing conductor is measured using a circuit of predetermined input impedance. The capacitance between the wire and each of the voltage sensing conductors may be the same, so that in measurement mode, when the first and second voltage sensing conductors are coupled together, the effective series capacitance provided in combination with the predetermined input impedance is four times as great. The results of the voltage measurement made in the calibration mode can thereby be used to adjust subsequent voltage measurements made in measurement mode with the first and second voltage sensing conductors combined in parallel.

Abstract: A method of measurement using a detachable current and voltage sensor provides an isolated and convenient technique for to measuring current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage.

Abstract: A detachable current and voltage sensor provides an isolated and convenient device to measure current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage.

Abstract: A method for managing power in a data processing system having multiple components includes determining a power budget for the system. Activity levels during a forthcoming time interval are then predicted for each of the components. Using the predicted activity levels, the power budget is allocated among the system components. An activity limit is then established for each component based on its corresponding portion of the power budget. The activity of a component is then monitored and, if the component's activity exceeds the component's corresponding activity limit, constrained. Determining the predicted level of activity may include determining a predicted number of instructions dispatched by a processor component or a predicted number of memory requests serviced for a system memory component. Allocating the power budget includes allocating each component its corresponding standby power and a share of the system power available for dynamic powering based on the expected levels of activity.

Abstract: A method and system for decreasing power consumption in memory arrays having usage-driven power management provides decreased power consumption in the memory array of a processing system. Per-page usage information is gathered on memory by a memory controller and periodically evaluated by software. The software distinguishes between more frequently accessed pages and less frequently accessed pages by analyzing the gathered usage information and periodically migrates physical memory pages in order to group less frequently accessed pages and more frequently access pages in separately power-managed memory ranks. When used in conjunction with a usage-driven power management mechanism, the ranks containing the less frequently accessed pages can enter deeper power-saving states and/or any power-saving state for longer periods.

Abstract: A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.

Abstract: A method and system for power management including device controller-based device use evaluation and power-state control provides improved performance in a power-managed processing system. Per-device usage information is measured and evaluated during process execution and is retrieved from the device controller upon a context switch, so that upon reactivation of the process, the previous usage evaluation state can be restored. The device controller can then provide for per-process control of attached device power management states without intervention by the processor and without losing the historical evaluation state when a process is switched out. The device controller can control power-saving states of connected devices in conformity with the usage evaluation without processor intervention and across multiple process execution slices. The device controller may be a memory controller and the controlled devices memory modules or banks within modules if individual banks can be power-managed.

Abstract: Processing system performance is improved while meeting power management constraints in a processing system by using activity factor headroom estimation. The method and system estimate the power consumption of the system from a model that relates measured activities at a present operating point to power consumption for any available operating point of one or more processors in the system. The method then chooses the operating point(s) with the highest performance among the available operating points that will still meet budgetary constraints or specific thresholds of power consumption. The budgetary constraints or specific thresholds may be dynamically adjusted, and the method will update the operating point(s) to maintain safe operation and maximize performance. The method provides the best performance for the executing workload while ensuring safe operation.

Abstract: A method for managing power in a data processing system having multiple components includes determining a power budget for the system. Activity levels during a forthcoming time interval are then predicted for each of the components. Using the predicted activity levels, the power budget is allocated among the system components. An activity limit is then established for each component based on its corresponding portion of the power budget. The activity of a component is then monitored and, if the component's activity exceeds the component's corresponding activity limit, constrained. Determining the predicted level of activity may include determining a predicted number of instructions dispatched by a processor component or a predicted number of memory requests serviced for a system memory component. Allocating the power budget includes allocating each component its corresponding standby power and a share of the system power available for dynamic powering based on the expected levels of activity.

Abstract: A method for managing power in a data processing system having multiple components includes determining a power budget for the system. Activity levels during a forthcoming time interval are then predicted for each of the components. Using the predicted activity levels, the power budget is allocated among the system components. An activity limit is then established for each component based on its corresponding portion of the power budget. The activity of a component is then monitored and, if the component's activity exceeds the component's corresponding activity limit, constrained. Determining the predicted level of activity may include determining a predicted number of instructions dispatched by a processor component or a predicted number of memory requests serviced for a system memory component. Allocating the power budget includes allocating each component its corresponding standby power and a share of the system power available for dynamic powering based on the expected levels of activity.

Abstract: A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.

Abstract: A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.

Abstract: A method and system for improving processing performance by using activity factor headroom provides improved performance while meeting power management constraints in a processing system. The method and system estimate the power consumption of the system from a model that relates measured activities at a present operating point to power consumption for any available operating point of one or more processors in the system. The method then chooses the operating point(s) with the highest performance among the available operating points that will still meet budgetary constraints or specific thresholds of power consumption. The budgetary constraints or specific thresholds may be dynamically adjusted, and the method will update the operating point(s) to maintain safe operation and maximize performance. The method provides the best performance for the executing workload while ensuring safe operation.

Abstract: A method and system for energy management in a simultaneous multi-threaded (SMT) processing system including per-thread device usage monitoring provides control of energy usage that accommodates thread parallelism. Per-device usage information is measured and stored on a per-thread basis, so that upon a context switch, the previous usage evaluation state can be restored. The per-thread usage information is used to adjust the thresholds of device energy management decision control logic, so that energy use can be managed with consideration as to which threads will be running in a given execution slice. A device controller can then provide for per-thread control of attached device power management states without intervention by the processor and without losing the historical evaluation state when a process is switched out. The device controller may be a memory controller and the controlled devices memory modules or banks within modules if individual banks can be power-managed.

Abstract: A method and controller for managing power and performance of a multiprocessor (MP) system is described. The controller receives sensor data corresponding to physical parameters within the MP system. The controller also receives quality of service and policy parameters corresponding to the MP system. The quality of service parameters define commitments to customers for utilization of the MP system. The policy parameters correspond to operation limits on inputs and outputs of the MP system. The operation input limits relate to the cost and availability of power or individual processor availability. The operation output limits relate to the amount of heat, acoustic noise levels, EMC levels, etc. that the individual or group of processors in the MP system are allowed to generate in a particular environment. A controller receives the physical parameters, the quality of service parameters and policy parameters and determines performance goals for the MP system and processors within the MP system.

Abstract: A method and system in which client requests to a multi-server, local area network (server cluster) are accumulated during discrete time intervals (batching periods), but not processed immediately. The servers are initialized to a low power state. At the end of a batching period or upon occurrence of some other specified event, the server cluster selects one or more servers to process the accumulated requests. The selected servers are then powered on and the requests are distributed to the powered servers for processing and response generation. After all requests have been responded to, the server cluster typically powers down the servers such that servers are actively powered only during the periods when batched requests are being processed. During times when a server cluster's request loading is sufficiently light, the response periods will be significantly shorter than the batching periods.

Abstract: A method and system for enhanced cache efficiency is a cache associated with a server in a wide area network having multiple servers and clients. Objects retrieved from the network by a server are stored within a cache associated with the server and selected objects are designated as temporarily exempt from replacement based upon a preselected criterion, such as size or mandated quality of service for the client which requested the object. After the cache is full or nearly full, subsequently retrieved objects are stored by casting out one or more objects which are not exempt from replacement according to a specified replacement algorithm, such as Least Recently Utilized, or by casting out any object or objects, if all objects in the cache are designated as exempt from replacement.

Abstract: The distribution of power dissipation within cluster systems is managed by a combination of inter-node and intra-node policies. The inter-node policy consists of subdividing the nodes within the cluster into three sets, namely the “Operational” set, the “Standby” set and the “Hibernating” set. Nodes in the Operational set continue to function and execute computation in response to user requests. Nodes in the Standby set have their processors in the low-energy standby mode and are ready to resume the computation immediately. Nodes in the Hibernating set are turned off to further conserve energy, and they need a relatively longer time to resume operation than nodes in the Standby set. The inter-node policy further distributes the computation among nodes in the Operational set such that each node in the set consumes the same amount of energy.

Abstract: A data processing server and method in which the server device stores a first fragment of a requested file in a first tier of storage while retaining subsequent fragments of the file in a lower tier of storage. The first tier is typically the server's volatile system memory while the second tier may represent a local disk, a networked storage device, or a remote system memory. When the server receives a client request for a file, the server transmits a first fragment of the file stored in the file cache to the client. Simultaneously, the server retrieves a subsequent fragment of the file from a lower tier of storage. By the time the first fragment is transmitted and acknowledged, the subsequent fragment is ready for transmission. In this manner, the server is able to maintain responsiveness while minimizing the amount of data cached in valuable system memory.