Abstract: A method and system for subnet defect diagnostics through fault compositing is disclosed. A testing apparatus generates callout data for an integrated circuit device under test. A computer received the callout data, which includes a list of faults. Each fault of the list of faults has associated with it one or more failures and/or conflicts. In order to explain the failures, two or more faults are selected and composited, yielding a composite fault having a composite conflict count. The composite fault is assigned a score based on the composite conflict count, which score determines a candidate composite that best explains the faults of the list of faults. This procedure may be repeated to explain all the failures.

Abstract: A method and system for test vector selection in statistical volume diagnosis using failed test data is disclosed. A computer-implemented method receives failures representing defects detected by an integrated circuit testing apparatus from a plurality of integrated circuits. Each of the plurality of integrated circuits is tested with a set of test vectors generated by the integrated circuit testing apparatus, and each of the plurality of failures is associated with a failed test vector. Using a first ranking scheme, each of the failures is given a rank and the corresponding failed test vector in each of the plurality of integrated circuits is annotated with the rank. The annotated failed test vectors are grouped using a grouping scheme, and each of the groups is given a group rank. A first group of failed test vectors is selected based on the group rank and diagnostics is run on the first group of failed test vectors.

Abstract: A method and system for subnet defect diagnostics through fault compositing is disclosed. Each fault contained in callout data comprises explain failure data and conflict counts. A first fault on a fan-out sink of a fan-out net that explains a first failure is selected from the callout data. A second fault on a different sink of the same fan-out net that explains a second failure that the first fault does not explain is selected. The first fault and the second fault are composited to yield a composite fault. The composite fault unions the failures explained by the first fault with the failures explained by the second fault. A composite conflict count is generated by combining the conflict count of the first fault and the conflict count of the second fault, and a score is assigned to the composite fault. A best candidate composite fault is determined based on the score.

Abstract: A method and system for identifying power defects using test pattern switching activity is disclosed. In one embodiment, a plurality of test patterns is applied to a circuit under test, and failure test patterns are identified from the plurality of test patterns by comparing the test result with the predicted test result. A switching activity count is obtained for each of the plurality of test patterns. Based on the switching activity count, ranks for each of the plurality of test patterns are provided. A correlation analysis is performed between the failure test patterns and the ranks of the switching activities. When there is a high correlation between the failure test pattern and the ranks of the switching activities, it is determined that the circuit likely contains a power defect. A power defect analysis is performed under the presence of the high correlation.

Abstract: A method and system for test vector selection in statistical volume diagnosis using failed test data is disclosed. A computer-implemented method receives failures representing defects detected by an integrated circuit testing apparatus from a plurality of integrated circuits. Each of the plurality of integrated circuits is tested with a set of test vectors generated by the integrated circuit testing apparatus, and each of the plurality of failures is associated with a failed test vector. Using a first ranking scheme, each of the failures is given a rank and the corresponding failed test vector in each of the plurality of integrated circuits is annotated with the rank. The annotated failed test vectors are grouped using a grouping scheme, and each of the groups is given a group rank. A first group of failed test vectors is selected based on the group rank and diagnostics is run on the first group of tailed test vectors.