Abstract: The present invention relates to a stent for transluminal implantation into hollow organs, in particular into blood vessels, ureters, esophagi, the colon, the duodenum, the airways or the biliary tract, comprising an at least substantially tubular body that extends along a longitudinal direction and that can be converted from a compressed state having a first cross-sectional diameter into an expanded state having an enlarged second cross-sectional diameter, wherein the stent comprises a stent body composed of a biostable material, characterized in that the stent body comprises a plurality of stent sections, preferably annular stent sections, that are in particular separate from one another, and the stent has a support structure that connects the stent sections to one another, wherein the support structure is formed from a bioresorbable material or comprises a bioresorbable material.

Abstract: The invention relates to a stent for transluminal implantation into hollow organs, in particular into blood vessels, ureters, esophagi, the colon, the duodenum, the airways or the biliary tract, comprising an at least substantially tubular body that extends along a longitudinal direction and that can be converted from a compressed state having a first cross-sectional diameter into an expanded state having an enlarged second cross-sectional diameter. The stent in accordance with the invention is characterized in that the tubular body comprises an inner body and an outer body, with the outer body surrounding the inner body at least regionally, with the outer body completely running around at least one section of the inner body, and the outer body is formed from a bioresorbable material or comprises a bioresorbable material.

Abstract: In high security devices, like smart cards, the on-board software may be embedded in ROM (read only memory). But, based on flexibility arguments, non-volatile flash memory based software storage can be more preferred. This invention describes a method to recover from a situation of data loss on flash devices by combining the on-device available secure boot-loading with embedded physical unclonable functions (PUF), where the PUF provides the cryptographic key for starting the data recovery procedure.

Abstract: In high security devices, like smart cards, the on-board software may be embedded in ROM (read only memory). But, based on flexibility arguments, non-volatile flash memory based software storage can be more preferred. This invention describes a method to recover from a situation of data loss on flash devices by combining the on-device available secure boot-loading with embedded physical unclonable functions (PUF), where the PUF provides the cryptographic key for starting the data recovery procedure.

Abstract: The invention relates to a data carrier (100) with a chip (10) which stores energy (13) as well as information for contact-bound or contactless inductive communication, and with a plurality of excitable chip sensors (11) integrated in the chip (10), which, after excitation (12), pass on a signal (18) to a CPU (19) of the chip (10), in which the signal (18) is processed. The invention is characterized in that, independently of storing energy (13) as well as information by the chip (10), the excitation (12) is specifically adjustable by the chip (10) for the purpose of additionally storing information and is adaptable to the requirements of processing the signal (18) in the CPU (19).

Abstract: A polymer prosthesis with lumen and an axial length and having in a pre-delivery condition a plurality of relatively stiff stenting segments spaced from each other along the length of the prosthesis, the spaces between the relatively stiff stenting segments of a first polymer being bridged by relatively flexible linking segments of a second polymer, different from the first, the relatively stiff stenting segments and the relatively flexible linking segments being alternately arranged along the length of the prosthesis.

Abstract: A contactless tag reader device comprises upper and lower electrodes which together define a tag location zone between them in which multiple tags can be placed. The lower electrode and the upper electrode are offset from each other such that they substantially do not overlap. This structure is used to sandwich tags vertically between two horizontally (laterally) offset reader electrodes. This enables power coupling and data transfer using capacitive coupling.

Abstract: A contactless tag reader device comprises upper and lower electrodes which together define a tag location zone between them in which multiple tags can be placed. The lower electrode and the upper electrode are offset from each other such that they substantially do not overlap. This structure is used to sandwich tags vertically between two horizontally (laterally) offset reader electrodes. This enables power coupling and data transfer using capacitive coupling.

Abstract: A polymer prosthesis with lumen and an axial length and having in a pre-delivery condition a plurality of relatively stiff stenting segments spaced from each other along the length of the prosthesis, the spaces between the relatively stiff stenting segments of a first polymer being bridged by relatively flexible linking segments of a second polymer, different from the first, the relatively stiff stenting segments and the relatively flexible linking segments being alternately arranged along the length of the prosthesis.

Abstract: The invention relates to a data carrier (100) with a chip (10) which stores energy (13) as well as information for contact-bound or contactless inductive communication, and with a plurality of excitable chip sensors (11) integrated in the chip (10), which, after excitation (12), pass on a signal (18) to a CPU (19) of the chip (10), in which the signal (18) is processed. The invention is characterized in that, independently of storing energy (13) as well as information by the chip (10), the excitation (12) is specifically adjustable by the chip (10) for the purpose of additionally storing information and is adaptable to the requirements of processing the signal (18) in the CPU (19).

Abstract: The present invention relates to a data-processing device, particularly a chip card or smart card, and to a method of operating said device, with an integrated circuit comprising a central processing unit (CPU) (10) and one or more co-processors (12). The integrated circuit comprises a control unit (18, 30) which controls the processors, CPU (10) and co-processors (12) in such a way that, in the case of a cryptographic operation, at least two processors perform a cryptographic operation simultaneously and in parallel.

Abstract: To provide an arrangement for identifying persons, comprising at least a one page or a multi-page identification document, particularly a passport (100), with at least one contactless RFID chip (20) and an antenna (22) connected thereto being integrated on its outer side, at least o: ie means for shielding electromagnetic waves is provided, which precludes unauthorized access to biometrical data.

Abstract: The invention relates to a microcontroller circuit, comprising circuit elements arranged on a semiconductor body. In order to make a tentative forgery of such a microcontroller circuit at least more difficult, at least a number of the co-operating circuit elements is provided on the semiconductor body in an irregularly scrambled spatial configuration.

Abstract: The present invention provides a method and apparatus for a mass storage subsystem such as a RAID array. The invention includes a housing which defines first and second cavities with the first cavity housing an array controller such as a RAID controller. The second cavity houses a plurality of substantially conventional IDE drives conforming to the 3.5″ form factor. The array is configured to maximize cooling of the array controller and the drives within the extremely small space defined by the housing.

Abstract: The present invention provides a method and apparatus whereby a single engine can manage multiple DMA queues and related functions for a mass storage subsystem such as a RAID array. By operating the engine at a suitably high clock rate, the key buses may be time multiplexed such that each bus operates at substantially its optimum frequency to maintain high efficiency of data throughput. To improve performance further, the DMA addressing function is allocated additional phases whenever the remaining buses have not requested access to the RAID engine.

Abstract: The arithmetic unit in a data processing system with a microprocessor and an additional arithmetic unit carries out special arithmetic operations, preferably integrated in a single semiconductor chip, is controlled by the microprocessor via a number of registers. Several sets of such registers are provided. The registers of one set are selected via a selection circuit. As a result, a set of registers which is not required during execution of a calculation by the arithmetic unit can be filled with new data by the microprocessor and, after completion of the calculation in the arithmetic unit, switching over to a newly filled set of registers takes place so that the arithmetic unit can continue with a new set of operands without having to observe a waiting period.

Abstract: In order to generate a non-disturbed binary output signal from a disturbed input signal, notably if the latter is periodic in the non-disturbed state, the invention proposes a circuit arrangement which includes two circuit branches which respond to different edge directions of the input signal. Each branch includes two series-connected flipflops and there is also provided a timing member which is common to the two circuit branches. As a result of a coupling of the two circuit branches to one another it is achieved that, after the triggering of one circuit branch, the other branch is blocked. Triggering of the other circuit branch is possible only after the delay time of the timing member has elapsed. It is thus achieved that the edges of the binary output signal have a minimum temporal spacing or that the binary output signal does not exceed a maximum frequency. Furthermore, a transition of the input signal is evaluated also if it occurs prior to the elapsing of the delay time.