Patents by Inventor Thomas Winter
Thomas Winter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7935545Abstract: The present invention includes a method of performing a double-patterning (DP) processing sequence using a plurality of Site-Dependent (S-D) procedures, the method including receiving a first set of wafers by one or more subsystems in a processing system, creating one or more first patterned layers on a first set of patterned wafers, establishing first confidence data for the first set of patterned wafers, establishing a first set of high confidence wafers, creating one or more second patterned layers on a second set of patterned wafers, establishing second confidence data for the second set of patterned wafers and establishing a second set of high confidence wafers.Type: GrantFiled: March 30, 2007Date of Patent: May 3, 2011Assignee: Tokyo Electron LimitedInventors: Mark Winkler, Thomas Winter
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Patent number: 7844387Abstract: A method for consumption-optimized operation of an internal combustion engine of a motor vehicle is described, an engine output of the internal combustion engine being set as a function of a position of a gas pedal according to a manipulated variable, the gas pedal being adjustable in a first mechanically defined adjustment range between an initial position and a specific gas pedal position, the internal combustion engine being controlled with a consumption-optimized engine output with regard to the instantaneous engine speed by adjusting the gas pedal to the specific gas pedal position, the consumption-optimized engine output causing a minimal fuel consumption at the instantaneous engine speed.Type: GrantFiled: January 17, 2008Date of Patent: November 30, 2010Assignee: Robert Bosch GmbHInventors: Uwe Bauer, Thomas Winter, Eveline-Johanna Fackelmann, Winfried Ziegler
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Patent number: 7783374Abstract: The present invention includes a method of performing a dual damascene procedure using Site-Dependent (S-D) procedures, the method including receiving a plurality of wafers and associated data by a S-D transfer subsystem coupled to a lithography-related subsystem, determining S-D wafer data for each wafer, establishing a first Dual Damascene processing sequence, determining a first set of S-D processing wafers to be processed, establishing real-time operational states for a plurality of first S-D processing elements in the lithography-related subsystem, transferring a first number of the first set of S-D processing wafers to a first number of the first S-D processing elements in the lithography-related subsystem and delaying other S-D wafers in the first set of S-D processing wafers for a first amount of time.Type: GrantFiled: March 30, 2007Date of Patent: August 24, 2010Assignee: Tokyo Electron LimitedInventors: Mark Winkler, Thomas Winter
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Patent number: 7772243Abstract: This invention provides quinazoline compounds of the formula: wherein: R1 is halo; R2 is H or halo; R3 is a) C1-C3 alkyl, optionally substituted by halo; or b) —(CH2)n-morpholino, —(CH2)n-piperidine, —(CH2)n-piperazine, —(CH2)n—-piperazine-N(C1-C3 alkyl), —(CH2)n-pyrrolidine, or —(CH2)n-imidazole; n is 1 to 4; R4 is —(CH2)m-Het; Het is morpholine, piperidine, piperazine, piperazine-N(C1-C3 alkyl), imidazole, pyrrolidine, azepane, 3,4-dihydro-2H-pyridine, or 3,6-dihydro-2H-pyridine, each optionally substituted by alkyl, halo, OH, NH2, NH(C1-C3 alkyl) or N (C1-C3 alkyl)2; m is 1-3; and X is O, S or NH; or a pharmaceutically acceptable salt thereof, as well as processes and intermediate compounds for making them, useful pharmaceutical compositions and methods of using the compounds in the treatment of proliferative diseases.Type: GrantFiled: May 5, 2005Date of Patent: August 10, 2010Assignee: Warner-Lambert Company LLCInventors: Stephen Alan Fakhoury, Helen Tsenwhei Lee, Jessica Elizabeth Reed, Kevin Matthew Schlosser, Karen Elaine Sexton, Haile Tecle, Roy Thomas Winters
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Publication number: 20100190977Abstract: This invention provides quinazoline compounds of the formula: wherein: R1 is halo; R2 is H or halo; R3 is a) C1-C3 alkyl, optionally substituted by halo; or b) —(CH2)n-morpholino, —(CH2)n-piperidine, —(CH2)n-piperazine, —(CH2)n-piperazine-N(C1-C3 alkyl), —(CH2)n-pyrrolidine, or —(CH2)n-imidazole; n is 1 to 4; R4 is —(CH2)m-Het; Het is morpholine, piperidine, piperazine, piperazine-N(C1-C3 alkyl), imidazole, pyrrolidine, azepane, 3,4-dihydro-2H-pyridine, or 3,6-dihydro-2H-pyridine, each optionally substituted by alkyl, halo, OH, NH2, NH(C1-C3 alkyl) or N(C1-C3 alkyl)2; m is 1-3; and X is O, S or NH; or a pharmaceutically acceptable salt thereof, as well as processes and intermediate compounds for making them, useful pharmaceutical compositions and methods of using the compounds in the treatment of proliferative diseases.Type: ApplicationFiled: April 5, 2010Publication date: July 29, 2010Inventors: Stephen Alan Fakhoury, Helen Tsenwhei Lee, Jessica Elizabeth Reed, Kevin Matthew Schlosser, Karen Elaine Sexton, Haile Tecle, Roy Thomas Winters
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Patent number: 7670643Abstract: An apparatus and method for dispensing a solution on a substrate is described in which the solution is dispensed through a solution nozzle assembly while the substrate is rotated. As the solution is dispensed, the solution on the substrate forms a wave front that radially spreads from the substrate center to the substrate edge. The dispensing of the solution is performed in such a way that the solution is dispensed at a radial location substantially equivalent to or less than the radial location of the wave front at any instant in time.Type: GrantFiled: July 1, 2004Date of Patent: March 2, 2010Assignee: Tokyo Electron LimitedInventors: Thomas Winter, Minoru Kubota
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Patent number: 7650200Abstract: The present invention includes a method of creating a Site-Dependent (S-D) evaluation library including receiving a plurality of S-D wafers by one or more S-D transfer subsystems in a processing system, establishing wafer state data for each S-D wafer, establishing a library-creation processing sequence for creating a library of S-D evaluation data, determining a first number of S-D process wafers to be processed, establishing first operational states for a plurality of S-D processing elements in one or more processing subsystems, determining a first number of available processing elements, establishing a first S-D transfer sequence, transferring the first number of S-D process wafers to the first number of available processing elements therein and applying a first corrective action.Type: GrantFiled: March 30, 2007Date of Patent: January 19, 2010Assignee: Tokyo Electron LimitedInventors: Mark Winkler, Thomas Winter
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Publication number: 20090321160Abstract: Method for operating a hybrid drive, in particular a parallel hybrid drive, of a vehicle. The parallel hybrid drive includes an internal combustion engine and at least one electric drive, at least one energy storage device, and a vehicle transmission. During deceleration phases in which a torque required on the transmission input side is present, the internal combustion engine is operated either in drag mode or at a minimum drive torque.Type: ApplicationFiled: March 9, 2007Publication date: December 31, 2009Inventors: Thomas Winter, Jochen Fassnacht, Nicole Weber, Kay Hindorf
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Publication number: 20090317546Abstract: An apparatus and method for dispensing a solution on a substrate is described in which the solution is dispensed through a solution nozzle assembly while the substrate is rotated. As the solution is dispensed, the solution on the substrate forms a wave front that radially spreads from the substrate center to the substrate edge. The dispensing of the solution is performed in such a way that the solution is dispensed at a radial location substantially equivalent to or less than the radial location of the wave front at any instant in time.Type: ApplicationFiled: August 4, 2009Publication date: December 24, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Thomas Winter, Minoru Kubota
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Patent number: 7596423Abstract: The present invention includes a method of verifying a Site-Dependent (S-D) processing procedure, the method including receiving a plurality of wafers by a S-D transfer system, determining S-D wafer state data for each wafer; establishing a first set of verification wafers, determining a number of required verification sites for each verification wafer, determining a number of visited verification sites, determining a number of remaining verification sites for each verification wafer, establishing a first procedure-verification sequence, determining a first S-D verification procedure, transferring the first verification wafer to a first S-D processing element and delaying the first verification wafer for a first period of time.Type: GrantFiled: March 30, 2007Date of Patent: September 29, 2009Assignee: Tokyo Electron LimitedInventors: Mark Winkler, Thomas Winter
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Publication number: 20090211604Abstract: Embodiments of the invention provide edge-bead removal systems and methods for removing edge-bead material from one or more surfaces of semiconductor wafers. Embodiments of the invention may be applied to process wafers at different points in a manufacturing cycle, and the wafers can include one or more metal layers.Type: ApplicationFiled: February 22, 2008Publication date: August 27, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Thomas Winter, James Klekotka
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Publication number: 20090211603Abstract: Embodiments of the invention provide post-etch cleaning systems and methods for removing post-etch residue material from one or more surfaces of semiconductor wafers. Embodiments of the invention may be applied to process wafers at different points in a manufacturing cycle, and the wafers can include one or more metal layers.Type: ApplicationFiled: February 22, 2008Publication date: August 27, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Thomas Winter, James Klekotka
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Publication number: 20090211602Abstract: Embodiments of the invention provide edge-bead removal systems and methods for removing edge-bead material from one or more surfaces of semiconductor wafers. Embodiments of the invention may be applied to process wafers at different points in a manufacturing cycle, and the wafers can include one or more metal layers.Type: ApplicationFiled: February 22, 2008Publication date: August 27, 2009Applicant: Tokyo Electron LimitedInventors: Thomas Winter, James Hart, Jeremy Fink, Mark Winkler
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Publication number: 20090177311Abstract: The invention can provide a method of processing a wafer using Site-Dependent (S-D) processing sequences that can include S-D creation procedures, S-D evaluation procedures, and S-D transfer sequences. The S-D creation procedures can be performed using S-D processing elements, the S-D evaluation procedures can be performed using S-D evaluation elements, and S-D transfer sequences can be performed using site-dependent transfer subsystems. Site-dependent data can be stored in site-dependent libraries and/or databases.Type: ApplicationFiled: March 12, 2009Publication date: July 9, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Mark Winkler, Thomas Winter
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Publication number: 20080245338Abstract: A method for consumption-optimized operation of an internal combustion engine of a motor vehicle is described, an engine output of the internal combustion engine being set as a function of a position of a gas pedal according to a manipulated variable, the gas pedal being adjustable in a first mechanically defined adjustment range between an initial position and a specific gas pedal position, the internal combustion engine being controlled with a consumption-optimized engine output with regard to the instantaneous engine speed by adjusting the gas pedal to the specific gas pedal position, the consumption-optimized engine output causing a minimal fuel consumption at the instantaneous engine speed.Type: ApplicationFiled: January 17, 2008Publication date: October 9, 2008Inventors: Uwe Bauer, Thomas Winter, Eveline-Johanna Fackelmann, Winfried Ziegler
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Publication number: 20080241971Abstract: The present invention includes a method of performing a double-patterning (DP) processing sequence using a plurality of Site-Dependent (S-D) procedures, the method including receiving a first set of wafers by one or more subsystems in a processing system, creating one or more first patterned layers on a first set of patterned wafers, establishing first confidence data for the first set of patterned wafers, establishing a first set of high confidence wafers, creating one or more second patterned layers on a second set of patterned wafers, establishing second confidence data for the second set of patterned wafers and establishing a second set of high confidence wafers.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Mark Winkler, Thomas Winter
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Publication number: 20080243294Abstract: The present invention includes a method of verifying a Site-Dependent (S-D) processing procedure, the method including receiving a plurality of wafers by a S-D transfer system, determining S-D wafer state data for each wafer; establishing a first set of verification wafers, determining a number of required verification sites for each verification wafer, determining a number of visited verification sites, determining a number of remaining verification sites for each verification wafer, establishing a first procedure-verification sequence, determining a first S-D verification procedure, transferring the first verification wafer to a first S-D processing element and delaying the first verification wafer for a first period of time.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Mark Winkler, Thomas Winter
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Publication number: 20080243297Abstract: The present invention includes a method of verifying a Site-Dependent (S-D) wafer that includes receiving a first set of S-D wafers by one or more S-D processing elements in one or more processing subsystems, creating a first set of unverified S-D wafers by performing a first S-D creation procedure, establishing S-D wafer state data for each unverified S-D wafer, establishing a first set of evaluation wafers comprising a first number of the unverified S-D wafers, establishing first operational states for a plurality of S-D evaluation elements, determining a first number of available evaluation elements, establishing a first S-D transfer sequence, transferring the first set of S-D evaluation wafers to the first number of available evaluation elements in one or more evaluation subsystems and applying a first corrective action when the number of S-D evaluation wafers is greater than the first number of available evaluation elements.Type: ApplicationFiled: April 9, 2008Publication date: October 2, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Mark Winkler, Thomas Winter
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Publication number: 20080243295Abstract: The present invention includes a method of creating a Site-Dependent (S-D) evaluation library including receiving a plurality of S-D wafers by one or more S-D transfer subsystems in a processing system, establishing wafer state data for each S-D wafer, establishing a library-creation processing sequence for creating a library of S-D evaluation data, determining a first number of S-D process wafers to be processed, establishing first operational states for a plurality of S-D processing elements in one or more processing subsystems, determining a first number of available processing elements, establishing a first S-D transfer sequence, transferring the first number of S-D process wafers to the first number of available processing elements therein and applying a first corrective action.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Mark Winkler, Thomas Winter
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Publication number: 20080241970Abstract: The present invention includes a method of performing a dual damascene procedure using Site-Dependent (S-D) procedures, the method including receiving a plurality of wafers and associated data by a S-D transfer subsystem coupled to a lithography-related subsystem, determining S-D wafer data for each wafer, establishing a first Dual Damascene processing sequence, determining a first set of S-D processing wafers to be processed, establishing real-time operational states for a plurality of first S-D processing elements in the lithography-related subsystem, transferring a first number of the first set of S-D processing wafers to a first number of the first S-D processing elements in the lithography-related subsystem and delaying other S-D wafers in the first set of S-D processing wafers for a first amount of time.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Mark Winkler, Thomas Winter